[Intel-gfx] [PATCH] drm/i915: Fix kerneldoc indent fails

Ville Syrjälä ville.syrjala at linux.intel.com
Thu Nov 26 08:58:15 PST 2015


On Thu, Nov 26, 2015 at 11:09:44AM +0100, Daniel Vetter wrote:
> On Wed, Nov 25, 2015 at 04:21:30PM +0200, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Pushed to dinq. Thanks for the review.

> 
> Aside: Build htmldocs results in a lot of complaints that many irq helpers
> here aren't included ... we should fix that to make it more likely the
> pretty kerneldoc gets noticed.
> -Daniel
> 
> 
> > ---
> >  drivers/gpu/drm/i915/i915_guc_submission.c |  2 +-
> >  drivers/gpu/drm/i915/i915_irq.c            | 20 ++++++++++----------
> >  2 files changed, 11 insertions(+), 11 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> > index ed9f1002ab36..a057cbd78ecb 100644
> > --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> > +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> > @@ -677,7 +677,7 @@ static struct drm_i915_gem_object *gem_allocate_guc_obj(struct drm_device *dev,
> >  /**
> >   * gem_release_guc_obj() - Release gem object allocated for GuC usage
> >   * @obj:	gem obj to be released
> > -  */
> > + */
> >  static void gem_release_guc_obj(struct drm_i915_gem_object *obj)
> >  {
> >  	if (!obj)
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 13445655e6b8..70d443330919 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -288,11 +288,11 @@ static i915_reg_t gen6_pm_ier(struct drm_i915_private *dev_priv)
> >  }
> >  
> >  /**
> > -  * snb_update_pm_irq - update GEN6_PMIMR
> > -  * @dev_priv: driver private
> > -  * @interrupt_mask: mask of interrupt bits to update
> > -  * @enabled_irq_mask: mask of interrupt bits to enable
> > -  */
> > + * snb_update_pm_irq - update GEN6_PMIMR
> > + * @dev_priv: driver private
> > + * @interrupt_mask: mask of interrupt bits to update
> > + * @enabled_irq_mask: mask of interrupt bits to enable
> > + */
> >  static void snb_update_pm_irq(struct drm_i915_private *dev_priv,
> >  			      uint32_t interrupt_mask,
> >  			      uint32_t enabled_irq_mask)
> > @@ -406,11 +406,11 @@ void gen6_disable_rps_interrupts(struct drm_device *dev)
> >  }
> >  
> >  /**
> > -  * bdw_update_port_irq - update DE port interrupt
> > -  * @dev_priv: driver private
> > -  * @interrupt_mask: mask of interrupt bits to update
> > -  * @enabled_irq_mask: mask of interrupt bits to enable
> > -  */
> > + * bdw_update_port_irq - update DE port interrupt
> > + * @dev_priv: driver private
> > + * @interrupt_mask: mask of interrupt bits to update
> > + * @enabled_irq_mask: mask of interrupt bits to enable
> > + */
> >  static void bdw_update_port_irq(struct drm_i915_private *dev_priv,
> >  				uint32_t interrupt_mask,
> >  				uint32_t enabled_irq_mask)
> > -- 
> > 2.4.10
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch

-- 
Ville Syrjälä
Intel OTC


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