[Intel-gfx] [PATCH 2/2] drm/i915/gen8: Flip the 48b switch

Michel Thierry michel.thierry at intel.com
Thu Oct 1 07:40:44 PDT 2015

On 10/1/2015 2:16 PM, Daniel Vetter wrote:
> On Wed, Sep 30, 2015 at 03:36:19PM +0100, Michel Thierry wrote:
>> Use 48b addresses if hw supports it (i915.enable_ppgtt=3).
>> Update the sanitize_enable_ppgtt for 48 bit PPGTT mode.
>> Note, aliasing PPGTT remains 32b only.
>> v2: s/full_64b/full_48b/. (Akash)
>> v3: Add sanitize_enable_ppgtt changes until here. (Akash)
>> v4: Update param description (Chris)
>> Cc: Akash Goel <akash.goel at intel.com>
>> Cc: Chris Wilson <chris at chris-wilson.co.uk>
>> Signed-off-by: Michel Thierry <michel.thierry at intel.com>
> Queued for -next, thanks for the patch. Can you please ping someone from
> mesa to push the libdrm/mesa patches too?

Sure, I'll start the libdmr-mesa process.


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