[Intel-gfx] [PATCH] drm/i915: Disable DC6 for now.

Rodrigo Vivi rodrigo.vivi at intel.com
Mon Oct 12 08:43:29 PDT 2015

There is an intermitent RAM corruption happening with DMC
micro-controler when in DC6 transitioning to PC9/10. So
the recoomendation is to use DC5 as the deeper DC state
for now until this issue is being investigated at firmware

This macros must be re-worked in order to allow us to use
module parameters to allow max DC states. However let's do
this simple approach first before products out there start
facing this corruption. Also this is the easiest one to be
backported by products.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
 drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index ec010ee..7332cc0 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -49,8 +49,8 @@
  * present for a given platform.
-#define GEN9_ENABLE_DC5(dev) 0
-#define SKL_ENABLE_DC6(dev) IS_SKYLAKE(dev)
+#define GEN9_ENABLE_DC5(dev) IS_SKYLAKE(dev)
+#define SKL_ENABLE_DC6(dev) 0
 #define for_each_power_well(i, power_well, domain_mask, power_domains)	\
 	for (i = 0;							\

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