[Intel-gfx] [PATCH 2/2] drm/i915: Fix primary_get_hw_state for gen9+.
Jani Nikula
jani.nikula at linux.intel.com
Tue Oct 13 05:38:30 PDT 2015
On Wed, 23 Sep 2015, Maarten Lankhorst <maarten.lankhorst at linux.intel.com> wrote:
> On skylake and broxton the old registers are no longer in use.
> Instead it uses universal planes, fix primary_get_hw to use the
> correct registers.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> Cc: stable at vger.kernel.org #v4.2+
Maarten, this patch has no reviews and it no longer applies to v4.3
cleanly. Please rebase and repost if it's still valid.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/intel_display.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 854896e4794e..92c96c34085d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -15097,7 +15097,10 @@ static bool primary_get_hw_state(struct intel_plane *plane)
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>
> - return I915_READ(DSPCNTR(plane->plane)) & DISPLAY_PLANE_ENABLE;
> + if (INTEL_INFO(dev_priv)->gen >= 9)
> + return I915_READ(PLANE_CTL(plane->plane, 0)) & PLANE_CTL_ENABLE;
> + else
> + return I915_READ(DSPCNTR(plane->plane)) & DISPLAY_PLANE_ENABLE;
> }
>
> /* FIXME read out full plane state for all planes */
> --
> 2.1.0
>
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--
Jani Nikula, Intel Open Source Technology Center
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