[Intel-gfx] [PATCH] drm/i915: Move skl/bxt gt specific workarounds to ring init

Daniel Vetter daniel at ffwll.ch
Tue Oct 13 08:43:28 PDT 2015


On Tue, Oct 13, 2015 at 04:08:10PM +0300, Jani Nikula wrote:
> On Mon, 12 Oct 2015, Mika Kuoppala <mika.kuoppala at linux.intel.com> wrote:
> > Some registers are, naturally, lost in gpu reset/suspend cycle.
> > And some registers, for example in display domain, are not subject
> > to gpu reset so they retain their contents.
> >
> > As hang recovery triggers a reset, recoverable gpu hang can currently
> > flush out essential workarounds and cause havoc later on.
> >
> > When register GEN8_GARBNTL is missing the WaEnableGapsTsvCreditFix:skl,
> > it can cause random system hangs [1]. This workaround was added in:
> > commit 245d96670d26 ("drm/i915:skl: Add WaEnableGapsTsvCreditFix")
> > But another set of system hangs were observed and the failure pattern
> > indicated that there was random gpu hang preceding the system hang [2].
> > This lead to the realization that we lose this workaround and BDW_SCRATCH1
> > on reset.
> >
> > Add these workarounds setup in display init to skl/bxt ring init
> > where LRI workarounds are also setup. This way their setup is not
> > dependent on display side init.
> >
> > References: [1] https://bugs.freedesktop.org/show_bug.cgi?id=90854
> > References: [2] https://bugs.freedesktop.org/show_bug.cgi?id=92315
> > Reported-by: Tomi Sarvela <tomix.p.sarvela at intel.com>
> > Cc: Tomi Sarvela <tomix.p.sarvela at intel.com>
> > Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
> 
> Tested-by: Tomi Sarvela <tomix.p.sarvela at intel.com>
> 
> Mika, the patch doesn't apply to v4.3-rc5 - is it needed there or in
> dinq?

We definitely need it in dinq to unblock future wa work, but it might be
needed for 4.3 just for skl. Applied it to dinq meanwhile, I guess we can
cherry-pick just the skl part if needed.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


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