[Intel-gfx] [PATCH 22/22] drm/i915: Don't pass pitch to intel_compute_page_offset()
ville.syrjala at linux.intel.com
ville.syrjala at linux.intel.com
Wed Oct 14 09:29:14 PDT 2015
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
intel_compute_page_offset() can dig up the correct pitch from the fb
itself, no need for the caller to pass it in.
A bit of extra care is needed for the lower level
_intel_compute_page_offset() since that one gets called before the
rotated pitch under intel_fb is populated. Note that we don't actually
call it with anything but DRM_ROTATE_0 there so we wouldn't actually
look up the rotated pitch there, but still, leave the pitch as something
the caller has to pass to _intel_compute_page_offset() as an
indicator that something is a bit special.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 32 +++++++++++++++++---------------
drivers/gpu/drm/i915/intel_drv.h | 1 -
drivers/gpu/drm/i915/intel_sprite.c | 26 +++++++++++---------------
3 files changed, 28 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8c7dc03..15dbe48 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2604,11 +2604,16 @@ static unsigned int _intel_compute_page_offset(const struct drm_i915_private *de
unsigned int intel_compute_page_offset(int *x, int *y,
const struct drm_framebuffer *fb, int plane,
- unsigned int pitch,
unsigned int rotation)
{
const struct drm_i915_private *dev_priv = to_i915(fb->dev);
unsigned int alignment = intel_surf_alignment(dev_priv, fb->modifier[plane]);
+ unsigned int pitch;
+
+ if (intel_rotation_90_or_270(rotation))
+ pitch = to_intel_framebuffer(fb)->plane[plane].rotated.pitch;
+ else
+ pitch = fb->pitches[plane];
return _intel_compute_page_offset(dev_priv, x, y, fb, plane, pitch,
rotation, alignment ? (alignment - 1) : 0);
@@ -3026,8 +3031,7 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
if (INTEL_INFO(dev)->gen >= 4)
intel_crtc->dspaddr_offset =
- intel_compute_page_offset(&x, &y, fb, 0,
- fb->pitches[0], rotation);
+ intel_compute_page_offset(&x, &y, fb, 0, rotation);
if (crtc->primary->state->rotation == BIT(DRM_ROTATE_180)) {
dspcntr |= DISPPLANE_ROTATE_180;
@@ -3129,8 +3133,7 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
intel_add_fb_offsets(&x, &y, fb, 0, rotation);
intel_crtc->dspaddr_offset =
- intel_compute_page_offset(&x, &y, fb, 0,
- fb->pitches[0], rotation);
+ intel_compute_page_offset(&x, &y, fb, 0, rotation);
if (rotation == BIT(DRM_ROTATE_180)) {
dspcntr |= DISPPLANE_ROTATE_180;
@@ -3308,7 +3311,7 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc,
struct intel_framebuffer *intel_fb;
bool visible = to_intel_plane_state(plane->state)->visible;
int pipe = intel_crtc->pipe;
- u32 plane_ctl, stride_div, stride;
+ u32 plane_ctl, stride;
unsigned int rotation;
unsigned long surf_addr;
struct intel_crtc_state *crtc_state = intel_crtc->config;
@@ -3365,18 +3368,17 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc,
src_w = drm_rect_width(&r);
src_h = drm_rect_height(&r);
- stride_div = intel_tile_height(dev_priv, fb->modifier[0],
- pixel_size);
- stride = intel_fb->plane[0].rotated.pitch;
+ stride = intel_fb->plane[0].rotated.pitch /
+ intel_tile_height(dev_priv, fb->modifier[0],
+ pixel_size);
} else {
- stride_div = intel_fb_stride_alignment(dev_priv, fb->modifier[0],
- fb->pixel_format);
- stride = fb->pitches[0];
+ stride = fb->pitches[0] /
+ intel_fb_stride_alignment(dev_priv, fb->modifier[0],
+ fb->pixel_format);
}
intel_add_fb_offsets(&x, &y, fb, 0, rotation);
- surf_addr = intel_compute_page_offset(&x, &y, fb, 0,
- stride, rotation);
+ surf_addr = intel_compute_page_offset(&x, &y, fb, 0, rotation);
/* Sizes are 0 based */
src_w--;
@@ -3389,7 +3391,7 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc,
I915_WRITE(PLANE_CTL(pipe, 0), plane_ctl);
I915_WRITE(PLANE_OFFSET(pipe, 0), (y << 16) | x);
- I915_WRITE(PLANE_STRIDE(pipe, 0), stride / stride_div);
+ I915_WRITE(PLANE_STRIDE(pipe, 0), stride);
I915_WRITE(PLANE_SIZE(pipe, 0), (src_h << 16) | src_w);
if (scaler_id >= 0) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 395afd3..af9861a 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1155,7 +1155,6 @@ void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state);
#define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
unsigned int intel_compute_page_offset(int *x, int *y,
const struct drm_framebuffer *fb, int plane,
- unsigned int pitch,
unsigned int rotation);
void intel_prepare_reset(struct drm_device *dev);
void intel_finish_reset(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 552c01d..c4b7226 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -191,7 +191,7 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
const int pipe = intel_plane->pipe;
const int plane = intel_plane->plane + 1;
- u32 plane_ctl, stride_div, stride;
+ u32 plane_ctl, stride;
int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
const struct drm_intel_sprite_colorkey *key =
&to_intel_plane_state(drm_plane->state)->ckey;
@@ -242,17 +242,16 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
src_w = drm_rect_width(&r);
src_h = drm_rect_height(&r);
- stride_div = intel_tile_height(dev_priv, fb->modifier[0], pixel_size);
- stride = intel_fb->plane[0].rotated.pitch;
+ stride = intel_fb->plane[0].rotated.pitch /
+ intel_tile_height(dev_priv, fb->modifier[0], pixel_size);
} else {
- stride_div = intel_fb_stride_alignment(dev_priv, fb->modifier[0],
- fb->pixel_format);
- stride = fb->pitches[0];
+ stride = fb->pitches[0] /
+ intel_fb_stride_alignment(dev_priv, fb->modifier[0],
+ fb->pixel_format);
}
intel_add_fb_offsets(&x, &y, fb, 0, rotation);
- surf_addr = intel_compute_page_offset(&x, &y, fb, 0,
- stride, rotation);
+ surf_addr = intel_compute_page_offset(&x, &y, fb, 0, rotation);
/* Sizes are 0 based */
src_w--;
@@ -261,7 +260,7 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
crtc_h--;
I915_WRITE(PLANE_OFFSET(pipe, plane), (y << 16) | x);
- I915_WRITE(PLANE_STRIDE(pipe, plane), stride / stride_div);
+ I915_WRITE(PLANE_STRIDE(pipe, plane), stride);
I915_WRITE(PLANE_SIZE(pipe, plane), (src_h << 16) | src_w);
/* program plane scaler */
@@ -426,8 +425,7 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
crtc_h--;
intel_add_fb_offsets(&x, &y, fb, 0, rotation);
- sprsurf_offset = intel_compute_page_offset(&x, &y, fb, 0,
- fb->pitches[0], rotation);
+ sprsurf_offset = intel_compute_page_offset(&x, &y, fb, 0, rotation);
if (rotation == BIT(DRM_ROTATE_180)) {
sprctl |= SP_ROTATE_180;
@@ -558,8 +556,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h;
intel_add_fb_offsets(&x, &y, fb, 0, rotation);
- sprsurf_offset = intel_compute_page_offset(&x, &y, fb, 0,
- fb->pitches[0], rotation);
+ sprsurf_offset = intel_compute_page_offset(&x, &y, fb, 0, rotation);
if (rotation == BIT(DRM_ROTATE_180)) {
sprctl |= SPRITE_ROTATE_180;
@@ -694,8 +691,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h;
intel_add_fb_offsets(&x, &y, fb, 0, rotation);
- dvssurf_offset = intel_compute_page_offset(&x, &y, fb, 0,
- fb->pitches[0], rotation);
+ dvssurf_offset = intel_compute_page_offset(&x, &y, fb, 0, rotation);
if (rotation == BIT(DRM_ROTATE_180)) {
dvscntr |= DVS_ROTATE_180;
--
2.4.9
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