[Intel-gfx] [PATCH] drm/i915: respect previous reg values on primary plane disable

Daniel Vetter daniel at ffwll.ch
Wed Oct 14 12:01:46 PDT 2015


On Wed, Oct 14, 2015 at 8:44 PM, Kevin Strasser
<kevin.strasser at linux.intel.com> wrote:
> On Wed, Oct 14, 2015 at 10:58:29AM +0300, Jani Nikula wrote:
>> On Wed, 14 Oct 2015, Kevin Strasser <kevin.strasser at linux.intel.com> wrote:
>> > On HSW the crc differs between black and disabled primary planes, causing an
>> > assert to fail in the kms_universal_plane test. It seems that things like gamma
>> > correction are causing the black primary plane case to result in a brighter
>> > color than the disabled primary plane case.
>> >
>> > Only toggle the enable bit instead of clearing the control register, making the
>> > disable path more similar to that of the sprite plane.
>> >
>> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89331
>> > Testcase: igt/kms_universal_plane
>> > Signed-off-by: Kevin Strasser <kevin.strasser at linux.intel.com>
>>
>> Cc: stable at vger.kernel.org # v3.18
>> Fixes: fdd508a64192 ("drm/i915: Call .update_primary_plane in intel_{enable, disable}_primary_hw_plane()")
>>
>> How about i9xx_update_primary_plane, modified in the same commit above,
>> and skylake_update_primary_plane, added in
>>
>> commit 6156a45602f990cdb140025a3ced96e6695980cf
>> Author: Chandra Konduru <chandra.konduru at intel.com>
>> Date:   Mon Apr 27 13:48:39 2015 -0700
>>
>>     drm/i915: skylake primary plane scaling using shared scalers
>
> Afaict HSW is the only platform that behaves in this way. I will follow up with
> a separate patch if needed.

Are you sure this is specific to hsw and not an artifact of e.g. the
hdmi color compression we do? That would apply the same on bdw, but
you need the same screen plugged in.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


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