[Intel-gfx] [PATCH 4/7] drm/i915/skl: Expose DC5/DC6 entry counts

Rodrigo Vivi rodrigo.vivi at gmail.com
Wed Oct 21 08:58:55 PDT 2015


Do you know how to calculate a residency with these counters?
To be able to expose that through sysfs to powertop. Otherwise I
believe we should also expose the counters itself to powertop that
would be useful already.

Anyway, for this patch:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>


On Wed, Oct 21, 2015 at 8:41 AM, Mika Kuoppala
<mika.kuoppala at linux.intel.com> wrote:
> From: Damien Lespiau <damien.lespiau at intel.com>
>
> The CSR firmware expose two counters, handy to check if we are indeed
> entering DC5/DC6.
>
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 7 +++++++
>  drivers/gpu/drm/i915/i915_reg.h     | 4 ++++
>  2 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 7a0592b..d9440cc 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2802,6 +2802,13 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
>         seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
>                    CSR_VERSION_MINOR(csr->version));
>
> +       if (IS_SKYLAKE(dev) && csr->version >= CSR_VERSION(1, 6)) {
> +               seq_printf(m, "DC3 -> DC5 count: %d\n",
> +                          I915_READ(SKL_CSR_DC3_DC5_COUNT));
> +               seq_printf(m, "DC5 -> DC6 count: %d\n",
> +                          I915_READ(SKL_CSR_DC5_DC6_COUNT));
> +       }
> +
>         return 0;
>  }
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9ebf032..fb03892 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5696,6 +5696,10 @@ enum skl_disp_power_wells {
>  #define GAMMA_MODE_MODE_12BIT  (2 << 0)
>  #define GAMMA_MODE_MODE_SPLIT  (3 << 0)
>
> +/* DMC/CSR */
> +#define SKL_CSR_DC3_DC5_COUNT  0x80030
> +#define SKL_CSR_DC5_DC6_COUNT  0x8002C
> +
>  /* interrupts */
>  #define DE_MASTER_IRQ_CONTROL   (1 << 31)
>  #define DE_SPRITEB_FLIP_DONE    (1 << 29)
> --
> 2.1.4
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br


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