[Intel-gfx] [PATCH 1/2] drm/i915/execlists: HWS is uncached on !llc platforms

[Chris Wilson]

On Fri, Oct 23, 2015 at 09:41:29PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 23, 2015 at 07:29:08PM +0100, Chris Wilson wrote:
> > On Fri, Oct 23, 2015 at 09:22:38PM +0300, Ville Syrjälä wrote:
> > > On Fri, Oct 23, 2015 at 06:56:41PM +0100, Chris Wilson wrote:
> > > > On Fri, Oct 23, 2015 at 08:50:42PM +0300, Ville Syrjälä wrote:
> > > > > On Fri, Oct 23, 2015 at 06:43:31PM +0100, Chris Wilson wrote:
> > > > > > As the HWS is mapped into the GPU as uncached,
> > > > > 
> > > > > Since when?
> > > > 
> > > > Since it is embedded into execlists' default context which is allocated
> > > > using the system default cache level, i.e. uncached on !llc. See
> > > > intel_lr_context_deferred_alloc()
> > > 
> > > Oh right. That doesn't actually matter since it's mapped through ggtt
> > > which means it always goes through PAT 0.
> > 
> > Oh, that again. Doesn't that mean we broke i915.enable_ppgtt=0?
> 
> Just means everything is snooped in that case. As long as the hardware
> doesn't get too upset about all the snooping it should work. Can't
> really recall if I actually tried it though. I think I did.

Just wondering if it means we start getting cacheline dirt on the
scanout. Though since snooping only occurs on flushes, I guess it
actually means it hits the backing storage and then is pushed into the
cpu cache. The other worry is whether we are then generating fsb snoop
traffic on every context switch. Just idle thoughts as I realise I don't
know as much about snooping as I'd like.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre