[Intel-gfx] [PATCH] drm/i915: Allow unready gpu to be reset on gen8
Chris Wilson
chris at chris-wilson.co.uk
Fri Oct 30 07:58:13 PDT 2015
On Fri, Oct 30, 2015 at 04:43:49PM +0200, Mika Kuoppala wrote:
> Gen9 has had demonstrated cases where forcing a not ready gpu
> into reset has caused system hang [1].
>
> Gen8 has never to this date demonstrated such behaviour.
>
> In our CI tests bsw sometimes ends up in a state where it claims it
> is not ready for reset, based on reset request, after gpu hang.
>
> Allow gen8 to reset even after claims of nonreadiness in order
> to keep the gpu accessible. Enhance logging so that it will be
> clear what conditions led to decision of proceeding or bailing out,
> so that we will spot if this way of forcing our will against gpu turns
> out to be foolhardy.
>
> References [1]: https://bugs.freedesktop.org/show_bug.cgi?id=89959
> Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> Cc: Tomi Sarvela <tomix.p.sarvela at intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index f0f97b2..47c17f2 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1504,7 +1504,14 @@ not_ready:
> I915_WRITE(RING_RESET_CTL(engine->mmio_base),
> _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET));
>
> - return -EIO;
Where's the reference for where we hit this EIO on gen8?
> + if (INTEL_INFO(dev)->gen == 9) {
> + DRM_ERROR("Reset would risk system stability, bailing out\n");
> + return -EIO;
> + }
> +
> + DRM_ERROR("Forcing non ready gpu into reset\n");
> +
> + return gen6_do_reset(dev);
> }
>
> static int (*intel_get_gpu_reset(struct drm_device *dev))(struct drm_device *)
> --
> 2.5.0
>
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--
Chris Wilson, Intel Open Source Technology Centre
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