[Intel-gfx] [PATCH] drm/i915: make A0 wa's applied to A1

[Daniel Vetter]

On Mon, Oct 26, 2015 at 10:48:58AM +0000, tim.gore at intel.com wrote:
> From: Tim Gore <tim.gore at intel.com>
> 
> Since A1 chips use the same GPU as A0, they need all the
> same wa's in the i915 driver. Update some conditionals
> to do this.

Neither summary nor commit message mentions that this is for bxt. Please
fix.
-Daniel

> 
> Signed-off-by: Tim Gore <tim.gore at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_guc_loader.c | 2 +-
>  drivers/gpu/drm/i915/intel_lrc.c        | 8 ++++----
>  drivers/gpu/drm/i915/intel_pm.c         | 2 +-
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++--
>  4 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index c0281df..6ec7b23 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -309,7 +309,7 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
>  
>  	/* WaDisableMinuteIaClockGating:skl,bxt */
>  	if (IS_SKL_REVID(dev, 0, SKL_REVID_B0) ||
> -	    IS_BXT_REVID(dev, 0, BXT_REVID_A0)) {
> +	    IS_BXT_REVID(dev, 0, BXT_REVID_A1)) {
>  		I915_WRITE(GUC_SHIM_CONTROL, (I915_READ(GUC_SHIM_CONTROL) &
>  					      ~GUC_ENABLE_MIA_CLOCK_GATING));
>  	}
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 3265427..971d3f2 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -285,7 +285,7 @@ static bool disable_lite_restore_wa(struct intel_engine_cs *ring)
>  	struct drm_device *dev = ring->dev;
>  
>  	return (IS_SKL_REVID(dev, 0, SKL_REVID_B0) ||
> -		IS_BXT_REVID(dev, 0, BXT_REVID_A0)) &&
> +		IS_BXT_REVID(dev, 0, BXT_REVID_A1)) &&
>  	       (ring->id == VCS || ring->id == VCS2);
>  }
>  
> @@ -1315,7 +1315,7 @@ static int gen9_init_indirectctx_bb(struct intel_engine_cs *ring,
>  
>  	/* WaDisableCtxRestoreArbitration:skl,bxt */
>  	if (IS_SKL_REVID(dev, 0, SKL_REVID_D0) ||
> -	    IS_BXT_REVID(dev, 0, BXT_REVID_A0))
> +	    IS_BXT_REVID(dev, 0, BXT_REVID_A1))
>  		wa_ctx_emit(batch, index, MI_ARB_ON_OFF | MI_ARB_DISABLE);
>  
>  	/* WaFlushCoherentL3CacheLinesAtContextSwitch:skl,bxt */
> @@ -1341,7 +1341,7 @@ static int gen9_init_perctx_bb(struct intel_engine_cs *ring,
>  
>  	/* WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken:skl,bxt */
>  	if (IS_SKL_REVID(dev, 0, SKL_REVID_B0) ||
> -	    IS_BXT_REVID(dev, 0, BXT_REVID_A0)) {
> +	    IS_BXT_REVID(dev, 0, BXT_REVID_A1)) {
>  		wa_ctx_emit(batch, index, MI_LOAD_REGISTER_IMM(1));
>  		wa_ctx_emit(batch, index, GEN9_SLICE_COMMON_ECO_CHICKEN0);
>  		wa_ctx_emit(batch, index,
> @@ -1351,7 +1351,7 @@ static int gen9_init_perctx_bb(struct intel_engine_cs *ring,
>  
>  	/* WaDisableCtxRestoreArbitration:skl,bxt */
>  	if (IS_SKL_REVID(dev, 0, SKL_REVID_D0) ||
> -	    IS_BXT_REVID(dev, 0, BXT_REVID_A0))
> +	    IS_BXT_REVID(dev, 0, BXT_REVID_A1))
>  		wa_ctx_emit(batch, index, MI_ARB_ON_OFF | MI_ARB_ENABLE);
>  
>  	wa_ctx_emit(batch, index, MI_BATCH_BUFFER_END);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 0fb0459..911f837 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4691,7 +4691,7 @@ static void gen9_enable_rc6(struct drm_device *dev)
>  			"on" : "off");
>  	/* WaRsUseTimeoutMode */
>  	if (IS_SKL_REVID(dev, 0, SKL_REVID_D0) ||
> -	    IS_BXT_REVID(dev, 0, BXT_REVID_A0)) {
> +	    IS_BXT_REVID(dev, 0, BXT_REVID_A1)) {
>  		I915_WRITE(GEN6_RC6_THRESHOLD, 625); /* 800us */
>  		I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE |
>  			   GEN7_RC_CTL_TO_MODE |
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 02a5bb0..368d78b 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1099,11 +1099,11 @@ static int bxt_init_workarounds(struct intel_engine_cs *ring)
>  
>  	/* WaStoreMultiplePTEenable:bxt */
>  	/* This is a requirement according to Hardware specification */
> -	if (IS_BXT_REVID(dev, 0, BXT_REVID_A0))
> +	if (IS_BXT_REVID(dev, 0, BXT_REVID_A1))
>  		I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_TLBPF);
>  
>  	/* WaSetClckGatingDisableMedia:bxt */
> -	if (IS_BXT_REVID(dev, 0, BXT_REVID_A0)) {
> +	if (IS_BXT_REVID(dev, 0, BXT_REVID_A1)) {
>  		I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) &
>  					    ~GEN8_DOP_CLOCK_GATE_MEDIA_ENABLE));
>  	}
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch