[Intel-gfx] [PATCH 2/4] drm/i915: restrict unclaimed register checking

Paulo Zanoni paulo.r.zanoni at intel.com
Thu Sep 3 12:51:43 PDT 2015


The unclaimed register bit is only triggered when someone touches the
specified register range.

For the normal use case (with i915.mmio_debug=0), this commit will
avoid the extra __raw_i915_read32() call for every register outside
the specified range, at the expense of a few additional "if"
statements.

v2: Put the register range checking earlier (Chris).

Cc: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 10c61a6..65e0ea8 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -595,6 +595,8 @@ void assert_forcewakes_inactive(struct drm_i915_private *dev_priv)
 	 !FORCEWAKE_GEN9_MEDIA_RANGE_OFFSET(reg) && \
 	 !FORCEWAKE_GEN9_COMMON_RANGE_OFFSET(reg))
 
+#define UNCLAIMED_CHECK_RANGE(reg) REG_RANGE(reg, 0x40000, 0xC0000)
+
 static void
 ilk_dummy_write(struct drm_i915_private *dev_priv)
 {
@@ -611,6 +613,9 @@ hsw_unclaimed_reg_debug(struct drm_i915_private *dev_priv, u32 reg, bool read,
 	const char *op = read ? "reading" : "writing to";
 	const char *when = before ? "before" : "after";
 
+	if (!UNCLAIMED_CHECK_RANGE(reg))
+		return;
+
 	if (!i915.mmio_debug)
 		return;
 
@@ -623,10 +628,13 @@ hsw_unclaimed_reg_debug(struct drm_i915_private *dev_priv, u32 reg, bool read,
 }
 
 static void
-hsw_unclaimed_reg_detect(struct drm_i915_private *dev_priv)
+hsw_unclaimed_reg_detect(struct drm_i915_private *dev_priv, u32 reg)
 {
 	static bool mmio_debug_once = true;
 
+	if (!UNCLAIMED_CHECK_RANGE(reg))
+		return;
+
 	if (i915.mmio_debug || !mmio_debug_once)
 		return;
 
@@ -892,7 +900,7 @@ hsw_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace)
 		gen6_gt_check_fifodbg(dev_priv); \
 	} \
 	hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \
-	hsw_unclaimed_reg_detect(dev_priv); \
+	hsw_unclaimed_reg_detect(dev_priv, reg); \
 	GEN6_WRITE_FOOTER; \
 }
 
@@ -934,7 +942,7 @@ gen8_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace
 		__force_wake_get(dev_priv, FORCEWAKE_RENDER); \
 	__raw_i915_write##x(dev_priv, reg, val); \
 	hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \
-	hsw_unclaimed_reg_detect(dev_priv); \
+	hsw_unclaimed_reg_detect(dev_priv, reg); \
 	GEN6_WRITE_FOOTER; \
 }
 
@@ -1000,7 +1008,7 @@ gen9_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, \
 		__force_wake_get(dev_priv, fw_engine); \
 	__raw_i915_write##x(dev_priv, reg, val); \
 	hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \
-	hsw_unclaimed_reg_detect(dev_priv); \
+	hsw_unclaimed_reg_detect(dev_priv, reg); \
 	GEN6_WRITE_FOOTER; \
 }
 
-- 
2.5.0



More information about the Intel-gfx mailing list