[Intel-gfx] Water mark update need to wait for next VSYNC?

Zhi Wang zhi.a.wang at intel.com
Sun Sep 6 04:30:26 PDT 2015


Hi William:
     There is a kind of display register marked as double-buffered. It 
means that HW will *not* latch the value in the register all the time. 
HW will only latch the value on the start of the vertical blank, or the 
time when pipe/plane are enabling.

So you will see some code pieces are waiting for frame count change 
after updating a register.

For WM registers, it should be double-buffered with armed attribute I 
believe. It means after writing the WM registers, you have to write 
another register to let the WM register become into "armed" state. After 
the register is "armed", HW will latch the value on the time point 
mentioned above.

So you should see in some code pieces, they write another register after 
updating the target register, then waits for the frame count change.

i.e update WM register -> update PLANE SURF register -> wait for frame 
count change

于 09/03/15 06:42, Xie, William 写道:
> Hi all,
>
>   Can anyone educate me if water mark update need to wait for next VSYNC?
>
> In other words, if we flip a frame to overlay for the first time,
>
> it will be showed in the next VBlank as water mark update needs to wait
> for that?
>
> Is this true or a bug?
>
> Thanks
>
> William
>
>
>
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> Intel-gfx at lists.freedesktop.org
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>


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