[Intel-gfx] [PATCH] drm/i915: Limit the number of loops for reading a split 64bit register
Jani Nikula
jani.nikula at linux.intel.com
Tue Sep 8 05:36:32 PDT 2015
On Tue, 08 Sep 2015, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> In I915_READ64_2x32 we attempt to read a 64bit register using 2 32bit
> reads. Due to the nature of the registers we try to read in this manner,
> they may increment between the two instruction (e.g. a timestamp
> counter). To keep the result accurate, we repeat the read if we detect
> an overflow (i.e. the upper value varies). However, some harware is just
> plain flaky and may endless loop as the the upper 32bits are not stable.
> Just give up after a couple of tries and report whatever we read last.
>
> Reported-by: russianneuromancer at ya.ru
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91906
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: MichaĆ Winiarski <michal.winiarski at intel.com>
> Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> Cc: stable at vger.kernel.org
> ---
> drivers/gpu/drm/i915/i915_drv.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 12870073d58f..8943dcb724a8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3402,13 +3402,13 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
> #define I915_READ64(reg) dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true)
>
> #define I915_READ64_2x32(lower_reg, upper_reg) ({ \
> - u32 upper, lower, tmp; \
> + u32 upper, lower, tmp, loop = 0; \
> tmp = I915_READ(upper_reg); \
> do { \
> upper = tmp; \
> lower = I915_READ(lower_reg); \
> tmp = I915_READ(upper_reg); \
> - } while (upper != tmp); \
> + } while (upper != tmp && loop++ != 2); \
Do you think it matters that you'll take the previous, not the last,
value when you give up?
BR,
Jani.
> (u64)upper << 32 | lower; })
>
> #define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg)
> --
> 2.5.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
More information about the Intel-gfx
mailing list