[Intel-gfx] [PATCH 5/6] drm/i915/guc: Media domain bit needed when notify GuC rc6 state

[Daniel Vetter]

On Thu, Sep 10, 2015 at 04:56:11PM -0700, yu.dai at intel.com wrote:
> From: Alex Dai <yu.dai at intel.com>
> 
> GuC expects two bits for Render and Media domain separately when
> driver sends data via host2guc SAMPLE_FORCEWAKE. Bit 0 is for
> Render and bit 1 is for Media domain.
> 
> Signed-off-by: Alex Dai <yu.dai at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_guc_submission.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> index 23c0a75..69f9c5e 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -158,7 +158,8 @@ static int host2guc_sample_forcewake(struct intel_guc *guc,
>  	u32 data[2];
>  
>  	data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE;
> -	data[1] = (intel_enable_rc6(dev_priv->dev)) ? 1 : 0;
> +	/* bit 0 and 1 are for Render and Media domain separately */
> +	data[1] = (intel_enable_rc6(dev_priv->dev)) ? 3 : 0;

Please don't have magic values, please add proper defines for 3 (best to
do 2 separate defines and | them together).

>  
>  	return host2guc_action(guc, data, 2);

Just aside: More magic values? Maybe replace with ARRAY_SIZE(date) to make
it self-explanatory.

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch