[Intel-gfx] [PATCH 35/43] drm/i915: Move __raw_i915_read8() & co. into i915_drv.h

Chris Wilson chris at chris-wilson.co.uk
Fri Sep 18 11:44:34 PDT 2015


On Fri, Sep 18, 2015 at 09:37:38PM +0300, Ville Syrjälä wrote:
> On Fri, Sep 18, 2015 at 07:33:50PM +0100, Chris Wilson wrote:
> > On Fri, Sep 18, 2015 at 09:23:11PM +0300, Ville Syrjälä wrote:
> > > On Fri, Sep 18, 2015 at 06:42:17PM +0100, Chris Wilson wrote:
> > > > On Fri, Sep 18, 2015 at 08:03:48PM +0300, ville.syrjala at linux.intel.com wrote:
> > > > > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > > > > 
> > > > > We have a few users of the raw register acces functions outside
> > > > > intel_uncore.c, so let's just move the functions into intel_drv.h.
> > > > 
> > > > I would rather see those external users converted to
> > > > I915_READ_FW/I915_WRITE_FW etc. You will then, no doubt, want to convert
> > > > those _FW macro definitions over to the uncore set.
> > > > 
> > > > Also due to how we write and post our accesses, the raw functions can be
> > > > the _relaxed variants.
> > > 
> > > Hmm. I think the only difference with the relaxed vs. not would be
> > > potential compiler reordering of memory accesses vs. mmio. So if we
> > > start using the relaxed versions we may need to start sprinkling
> > > barriers around.
> > 
> > Yes. We have been working under that assumption (weak ordering of writes),
> > or at least I hope we all have been...
> 
> Well, looking at the irq code that uses the _FW, what would prevent the
> compiler from eg. reorder the seqno read to happen before the IIR read?
> Well in practice function calls are involved, so there's a barrier
> there, but say we would want to read the seqno straight from the irq
> handler...

What seqno read? We definitely don't want to be doing those expensive
reads from an irq handler...

Anyway, I thought we had strongly ordered reads on x64/x32?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


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