[Intel-gfx] [PATCH] drm/i915/guc: Don't send flips to GuC

[O'Rourke, Tom]

On Tue, Sep 22, 2015 at 04:11:48PM -0700, yu.dai at intel.com wrote:
> From: Sagar Arun Kamble <sagar.a.kamble at intel.com>
> 
> Due to flip interrupts GuC stays awake always and GT does not enter
> RC6. Do not route those interrupts to GuC for now. Driver won't touch
> DE_GUCRMR register and leave it as what default value.
> 
> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
> Signed-off-by: Alex Dai <yu.dai at intel.com>

Looks good to me.

Reviewed-by: Tom O'Rourke <Tom.O'Rourke at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_guc_loader.c | 10 ----------
>  1 file changed, 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index 740bfb3..d513673 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -90,9 +90,6 @@ static void direct_interrupts_to_host(struct drm_i915_private *dev_priv)
>  	for_each_ring(ring, dev_priv, i)
>  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
>  
> -	/* tell DE to send nothing to GuC */
> -	I915_WRITE(DE_GUCRMR, ~0);
> -
>  	/* route all GT interrupts to the host */
>  	I915_WRITE(GUC_BCS_RCS_IER, 0);
>  	I915_WRITE(GUC_VCS2_VCS1_IER, 0);
> @@ -110,13 +107,6 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
>  	for_each_ring(ring, dev_priv, i)
>  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
>  
> -	/* tell DE to send (all) flip_done to GuC */
> -	irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE |
> -	       DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE |
> -	       DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE;
> -	/* Unmasked bits will cause GuC response message to be sent */
> -	I915_WRITE(DE_GUCRMR, ~irqs);
> -
>  	/* route USER_INTERRUPT to Host, all others are sent to GuC. */
>  	irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
>  	       GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
> -- 
> 1.9.1
> 
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