[Intel-gfx] [RFC PATCH] drm/i915: Consider SPLL as another shared pll.

[Maarten Lankhorst]

Op 23-09-15 om 14:42 schreef Daniel Vetter:
> On Wed, Sep 16, 2015 at 09:23:59AM +0200, Maarten Lankhorst wrote:
>> When diagnosing a unrelated bug for someone on irc, it would seem the hardware can
>> be brought up by the BIOS with the embedded displayport using the SPLL for spread spectrum.
>>
>> Right now this is not handled well in i915, and it calculates the crtc needs to
>> be reprogrammed on the first modeset without SSC, but  the SPLL itself was kept
>> active. Fix this by exposing SPLL as a shared pll that will not be returned
>> by intel_get_shared_dpll; you have to know it exists to use it. ;-)
>>
>> Cc: Emil Renner Berthing <kernel at esmil.dk>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
>> ---
>> RFC because I haven't tested it with VGA, but it seems to work according to fix
>> the problem mentioned above.
> lgtm and gets rid of some of the fdi vs. normal ddi special-casing, which
> is nice (since that's a problem for bxt dsi too). I'll pick this up as
> soon as you managed to run this on some hsw (since we inject a fake vga
> screen for igt tests you don't even need a real screen).
>
Emil, do you have a haswell and if so can you test with intel-gpu-tools? kms_pipe_crc_basic and see if it works correctly.