[Intel-gfx] [PATCH 5/7] drm/i915: fix FBC buffer size checks

[Chris Wilson]

On Wed, Sep 23, 2015 at 12:52:25PM -0300, Paulo Zanoni wrote:
> According to my experiments, the maximum sizes mentioned in the
> specification delimit how far in the buffer the hardware tracking can
> go. And the hardware seems to calculate the size based on the plane
> address and x/y offsets we specify to it. So adjust the code to do the
> proper checks.
> 
> On platforms that do the x/y offset adjustment trick it will be really
> hard to reproduce a bug, but on the current SKL we can reproduce the
> bug with igt/kms_frontbuffer_tracking/fbc-farfromfence. With this
> patch, we'll go from "CRC assertion failure" to "FBC unexpectedly
> disabled", which is still a failure on the test suite but is not a
> perceived user bug - you will just not save as much power as you could
> be if FBC is disabled.
> 
> Testcase: igt/kms_frontbuffer_tracking/fbc-farfromfence (SKL)
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

Same query again for using src_[wh]. Do we have tests for FBC + panel
fitting?

Did I miss some explanation in the code that isn't visible in the diffs?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre