[Intel-gfx] [PATCH v2 3/6] drm/i915/guc: Add host2guc notification for suspend and resume
Kamble, Sagar A
sagar.a.kamble at intel.com
Thu Sep 24 01:27:18 PDT 2015
On 9/23/2015 2:18 AM, yu.dai at intel.com wrote:
> From: Alex Dai <yu.dai at intel.com>
>
> Add host2guc interfaces to nofigy GuC power state changes when
*notify
> enter or resume from power saving state.
>
> v1: Change to a more flexible way when fill host to GuC scratch
> data in order to remove hard coding.
>
> Signed-off-by: Alex Dai <yu.dai at intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 1 +
> drivers/gpu/drm/i915/i915_gem.c | 1 +
> drivers/gpu/drm/i915/i915_guc_submission.c | 50 ++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_guc.h | 2 ++
> drivers/gpu/drm/i915/intel_guc_fwif.h | 8 +++++
> drivers/gpu/drm/i915/intel_guc_loader.c | 4 ++-
> 6 files changed, 65 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index e2bf9e2..8f2a139 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -735,6 +735,7 @@ static int i915_drm_resume(struct drm_device *dev)
> DRM_ERROR("failed to re-initialize GPU, declaring wedged!\n");
> atomic_or(I915_WEDGED, &dev_priv->gpu_error.reset_counter);
> }
> + intel_guc_resume(dev);
Need to call from intel_runtime_resume as well.
> mutex_unlock(&dev->struct_mutex);
>
> intel_modeset_init_hw(dev);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 46f0e83..92dd4ff 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4458,6 +4458,7 @@ i915_gem_suspend(struct drm_device *dev)
> i915_gem_retire_requests(dev);
>
> i915_gem_stop_ringbuffers(dev);
> + intel_guc_suspend(dev);
Should this be called as part of i915_drm_suspend for consistency?
Need to call from intel_runtime_suspend as well.
> mutex_unlock(&dev->struct_mutex);
>
> cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work);
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> index 792d0b9..38b6ef4 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -914,3 +914,53 @@ void i915_guc_submission_fini(struct drm_device *dev)
> gem_release_guc_obj(guc->ctx_pool_obj);
> guc->ctx_pool_obj = NULL;
> }
> +
> +/**
> + * intel_guc_suspend() - notify GuC entering suspend state
> + * @dev: drm device
> + */
> +int intel_guc_suspend(struct drm_device *dev)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + struct intel_guc *guc = &dev_priv->guc;
> + struct intel_context *ctx;
> + u32 data[3];
> +
> + if (!i915.enable_guc_submission)
> + return 0;
> +
> + ctx = dev_priv->ring[RCS].default_context;
> +
> + data[0] = HOST2GUC_ACTION_ENTER_S_STATE;
> + /* any value greater than GUC_POWER_D0 */
> + data[1] = GUC_POWER_D1;
> + /* first page is shared data with GuC */
> + data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state);
> +
> + return host2guc_action(guc, data, ARRAY_SIZE(data));
> +}
> +
> +
> +/**
> + * intel_guc_resume() - notify GuC resuming from suspend state
> + * @dev: drm device
> + */
> +int intel_guc_resume(struct drm_device *dev)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + struct intel_guc *guc = &dev_priv->guc;
> + struct intel_context *ctx;
> + u32 data[3];
> +
> + if (!i915.enable_guc_submission)
> + return 0;
> +
> + ctx = dev_priv->ring[RCS].default_context;
> +
> + data[0] = HOST2GUC_ACTION_EXIT_S_STATE;
> + data[1] = GUC_POWER_D0;
> + /* first page is shared data with GuC */
> + data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state);
> +
> + return host2guc_action(guc, data, ARRAY_SIZE(data));
> +}
> diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> index e1389fc..e90c156 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -110,6 +110,8 @@ extern void intel_guc_ucode_init(struct drm_device *dev);
> extern int intel_guc_ucode_load(struct drm_device *dev);
> extern void intel_guc_ucode_fini(struct drm_device *dev);
> extern const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status);
> +extern int intel_guc_suspend(struct drm_device *dev);
> +extern int intel_guc_resume(struct drm_device *dev);
>
> /* i915_guc_submission.c */
> int i915_guc_submission_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
> index 006dc0d..f6d0aa4 100644
> --- a/drivers/gpu/drm/i915/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
> @@ -254,12 +254,20 @@ struct guc_context_desc {
> u64 desc_private;
> } __packed;
>
> +#define GUC_POWER_UNSPECIFIED 0
> +#define GUC_POWER_D0 1
> +#define GUC_POWER_D1 2
> +#define GUC_POWER_D2 3
> +#define GUC_POWER_D3 4
> +
> /* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */
> enum host2guc_action {
> HOST2GUC_ACTION_DEFAULT = 0x0,
> HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
> HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
> HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
> + HOST2GUC_ACTION_ENTER_S_STATE = 0x501,
> + HOST2GUC_ACTION_EXIT_S_STATE = 0x502,
> HOST2GUC_ACTION_SLPC_REQUEST = 0x3003,
> HOST2GUC_ACTION_LIMIT
> };
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index a6703b4..740bfb3 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -416,7 +416,6 @@ int intel_guc_ucode_load(struct drm_device *dev)
> intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
>
> direct_interrupts_to_host(dev_priv);
> - i915_guc_submission_disable(dev);
>
> if (guc_fw->guc_fw_fetch_status == GUC_FIRMWARE_NONE)
> return 0;
> @@ -466,6 +465,9 @@ int intel_guc_ucode_load(struct drm_device *dev)
> intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
>
> if (i915.enable_guc_submission) {
> + /* The execbuf_client will be recreated. Release it first. */
> + i915_guc_submission_disable(dev);
> +
> err = i915_guc_submission_enable(dev);
> if (err)
> goto fail;
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