[Intel-gfx] [PATCH 03/15] drm/i915: Set scaler mode for NV12

[Daniel Vetter]

On Tue, Sep 29, 2015 at 08:47:15PM +0300, Ville Syrjälä wrote:
> On Fri, Sep 04, 2015 at 07:32:59PM -0700, Chandra Konduru wrote:
> > This patch sets appropriate scaler mode for NV12 format.
> > In this mode, skylake scaler does either chroma-upsampling or
> > chroma-upsampling and resolution scaling.
> > 
> > v2:
> > - new reg defines squashed into patches used them (Ville)
> > 
> > Signed-off-by: Chandra Konduru <chandra.konduru at intel.com>
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Merged up to this patch to dinq.
-Daniel

> 
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h     |    1 +
> >  drivers/gpu/drm/i915/intel_atomic.c |    5 ++++-
> >  2 files changed, 5 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 1fa0554..825d721 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -5498,6 +5498,7 @@ enum skl_disp_power_wells {
> >  #define PS_SCALER_MODE_MASK (3 << 28)
> >  #define PS_SCALER_MODE_DYN  (0 << 28)
> >  #define PS_SCALER_MODE_HQ  (1 << 28)
> > +#define PS_SCALER_MODE_NV12 (2 << 28)
> >  #define PS_PLANE_SEL_MASK  (7 << 25)
> >  #define PS_PLANE_SEL(plane) ((plane + 1) << 25)
> >  #define PS_FILTER_MASK         (3 << 23)
> > diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c
> > index 9336e80..fd3972c 100644
> > --- a/drivers/gpu/drm/i915/intel_atomic.c
> > +++ b/drivers/gpu/drm/i915/intel_atomic.c
> > @@ -247,7 +247,10 @@ int intel_atomic_setup_scalers(struct drm_device *dev,
> >  		}
> >  
> >  		/* set scaler mode */
> > -		if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
> > +		if (plane_state && plane_state->base.fb &&
> > +			plane_state->base.fb->pixel_format == DRM_FORMAT_NV12) {
> > +			scaler_state->scalers[*scaler_id].mode = PS_SCALER_MODE_NV12;
> > +		} else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
> >  			/*
> >  			 * when only 1 scaler is in use on either pipe A or B,
> >  			 * scaler 0 operates in high quality (HQ) mode.
> > -- 
> > 1.7.9.5
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch