[Intel-gfx] [PATCH 0/2] Wa32bit & Enable 48bit PPGTT
Michel Thierry
michel.thierry at intel.com
Wed Sep 30 07:36:17 PDT 2015
I am resending the 2 remaining patches to enable 48-bit PPGTT, now that the
userland usage has been defined and acknowledged.
These patches are exactly the same that were sent with the rest of the 48-bit
PPGTT implementation that are already merged.
There are 2 hardware workarounds needed to allow correct operation with
48b addresses (Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset).
A flag (EXEC_OBJECT_SUPPORTS_48B_ADDRESS) will indicate if a given object can
be allocated outside the first 4 PDPs; if not, the end range is forced to 4GB.
Also, more objects now use the DRM_MM_CREATE_TOP flag. To maintain
compatibility, in libdrm I added a new bo_use_48b_address_range function
that will flag these objects, while the existing drm_intel_bo_emit_reloc
clears it.
Userland patch:
http://lists.freedesktop.org/archives/intel-gfx/2015-September/075086.html
acknowledged:
http://lists.freedesktop.org/archives/intel-gfx/2015-September/075836.html
Michel Thierry (2):
drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset
drm/i915/gen8: Flip the 48b switch
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_gem.c | 25 +++++++++++++++++++------
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 13 +++++++++++++
drivers/gpu/drm/i915/i915_gem_gtt.c | 7 ++++++-
drivers/gpu/drm/i915/i915_params.c | 2 +-
include/uapi/drm/i915_drm.h | 3 ++-
6 files changed, 43 insertions(+), 9 deletions(-)
--
2.6.0
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