[Intel-gfx] [PATCH 09/16] drm/i915/gen9: Drop re-allocation of DDB at atomic commit

Matt Roper matthew.d.roper at intel.com
Fri Apr 1 01:46:31 UTC 2016


Now that we're properly pre-allocating the DDB during the atomic check
phase and we trust that the allocation is appropriate, let's actually
use the allocation computed and not duplicate that work during the
commit phase.

Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 14 +-----
 drivers/gpu/drm/i915/intel_pm.c      | 84 ++++++++----------------------------
 2 files changed, 18 insertions(+), 80 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6bf2ede..fa4e5e3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13523,6 +13523,7 @@ static int intel_atomic_commit(struct drm_device *dev,
 
 	drm_atomic_helper_swap_state(dev, state);
 	dev_priv->wm.config = intel_state->wm_config;
+	dev_priv->wm.skl_results.ddb = intel_state->ddb;
 	intel_shared_dpll_commit(state);
 
 	if (intel_state->modeset) {
@@ -13636,19 +13637,6 @@ static int intel_atomic_commit(struct drm_device *dev,
 			modeset_put_power_domains(dev_priv, put_domains[i]);
 	}
 
-	/*
-	 * Temporary sanity check: make sure our pre-computed DDB matches the
-	 * one we actually wind up programming.
-	 *
-	 * Not a great place to put this, but the easiest place we have access
-	 * to both the pre-computed and final DDB's; we'll be removing this
-	 * check in the next patch anyway.
-	 */
-	WARN(IS_GEN9(dev) &&
-	     memcmp(&intel_state->ddb, &dev_priv->wm.skl_results.ddb,
-		    sizeof(intel_state->ddb)),
-	     "Pre-computed DDB does not match final DDB!\n");
-
 	if (intel_state->modeset)
 		intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
 
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8e283cf..d58a405 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2966,26 +2966,15 @@ skl_get_total_relative_data_rate(const struct intel_crtc_state *cstate)
 	struct drm_plane *plane;
 	unsigned int total_data_rate = 0;
 
+	if (WARN_ON(!state))
+		return 0;
+
 	drm_for_each_plane_mask(plane, dev, cstate->base.plane_mask) {
 		struct drm_plane_state *pstate;
 
-		/*
-		 * FIXME: At the moment this function can be called on either
-		 * an in-flight or a committed state object.  If it's in-flight
-		 * we want to also use the in-flight plane state; otherwise
-		 * use the committed plane state.
-		 *
-		 * Once we finish moving our DDB allocation to the atomic check
-		 * phase, we'll only be calling this function on in-flight
-		 * state objects and should never see a NULL state here.
-		 */
-		if (state) {
-			pstate = drm_atomic_get_plane_state(state, plane);
-			if (IS_ERR(pstate))
-				return PTR_ERR(pstate);
-		} else {
-			pstate = plane->state;
-		}
+		pstate = drm_atomic_get_plane_state(state, plane);
+		if (IS_ERR(pstate))
+			return PTR_ERR(pstate);
 
 		if (!to_intel_plane_state(pstate)->visible)
 			continue;
@@ -3015,9 +3004,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
 {
 	struct drm_crtc *crtc = cstate->base.crtc;
 	struct drm_device *dev = crtc->dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	struct intel_plane *intel_plane;
+	struct intel_atomic_state *intel_state;
 	enum pipe pipe = intel_crtc->pipe;
 	struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
 	uint16_t alloc_size, start, cursor_blocks;
@@ -3035,21 +3024,11 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
 		return 0;
 	}
 
-	/*
-	 * TODO:  At the moment we might call this on either an in-flight CRTC
-	 * state or an already-committed state, so look up the number of
-	 * active CRTC's accordingly.  Eventually this will only be called
-	 * on in-flight states and we'll be able to drop some of this extra
-	 * logic.
-	 */
-	if (cstate->base.state) {
-		struct intel_atomic_state *intel_state =
-			to_intel_atomic_state(cstate->base.state);
+	if (WARN_ON(!cstate->base.state))
+		return 0;
 
-		active_crtcs = intel_state->active_crtcs;
-	} else {
-		active_crtcs = dev_priv->active_crtcs;
-	}
+	intel_state = to_intel_atomic_state(cstate->base.state);
+	active_crtcs = intel_state->active_crtcs;
 
 	skl_ddb_get_pipe_allocation_limits(dev, cstate, active_crtcs, alloc);
 	alloc_size = skl_ddb_entry_size(alloc);
@@ -3074,18 +3053,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
 		struct drm_framebuffer *fb = plane->state->fb;
 		int id = skl_wm_plane_id(intel_plane);
 
-		/*
-		 * TODO: Remove support for already-committed state once we
-		 * only allocate DDB on in-flight states.
-		 */
-		if (cstate->base.state) {
-			pstate = drm_atomic_get_plane_state(cstate->base.state,
-							    plane);
-			if (IS_ERR(pstate))
-				return PTR_ERR(pstate);
-		} else {
-			pstate = plane->state;
-		}
+		pstate = drm_atomic_get_plane_state(cstate->base.state, plane);
+		if (IS_ERR(pstate))
+			return PTR_ERR(pstate);
 
 		if (!to_intel_plane_state(pstate)->visible)
 			continue;
@@ -3116,18 +3086,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
 		uint16_t plane_blocks, y_plane_blocks = 0;
 		int id = skl_wm_plane_id(intel_plane);
 
-		/*
-		 * TODO: Remove support for already-committed state once we
-		 * only allocate DDB on in-flight states.
-		 */
-		if (cstate->base.state) {
-			pstate = drm_atomic_get_plane_state(cstate->base.state,
-							    plane);
-			if (WARN_ON(IS_ERR(pstate)))
-				return PTR_ERR(pstate);
-		} else {
-			pstate = plane->state;
-		}
+		pstate = drm_atomic_get_plane_state(cstate->base.state, plane);
+		if (WARN_ON(IS_ERR(pstate)))
+			return PTR_ERR(pstate);
 
 		if (!to_intel_plane_state(pstate)->visible)
 			continue;
@@ -3660,7 +3621,6 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc,
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
 
-	WARN_ON(skl_allocate_pipe_ddb(cstate, ddb) != 0);
 	skl_build_pipe_wm(cstate, ddb, pipe_wm);
 
 	if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
@@ -3724,16 +3684,6 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
 	memset(watermarks->plane_trans[pipe],
 	       0, sizeof(uint32_t) * I915_MAX_PLANES);
 	watermarks->plane_trans[pipe][PLANE_CURSOR] = 0;
-
-	/* Clear ddb entries for pipe */
-	memset(&watermarks->ddb.pipe[pipe], 0, sizeof(struct skl_ddb_entry));
-	memset(&watermarks->ddb.plane[pipe], 0,
-	       sizeof(struct skl_ddb_entry) * I915_MAX_PLANES);
-	memset(&watermarks->ddb.y_plane[pipe], 0,
-	       sizeof(struct skl_ddb_entry) * I915_MAX_PLANES);
-	memset(&watermarks->ddb.plane[pipe][PLANE_CURSOR], 0,
-	       sizeof(struct skl_ddb_entry));
-
 }
 
 static int
-- 
2.1.4



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