[Intel-gfx] [PATCH] drm/i915: Correct stepping check for WaRsDisableCoarsePowerGating

[Arun Siluvery]

This WA is applied in two different places for SKL GT3, GT4 until
E0. Previously we were applying until F0 at one place.

A macro was introduced in the below commit to replace both usages but now
we apply this WA until F0 in both places, this patch correct this.

    commit 06e668ac91c93eb10bd21dfcc8891493722db29a
    Author: Mika Kuoppala <mika.kuoppala at linux.intel.com>
    Date:   Wed Dec 16 19:18:37 2015 +0200

    drm/i915: Apply broader WaRsDisableCoarsePowerGating for guc also

Cc: Sagar Arun Kamble <sagar.a.kamble at intel.com>
Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 10fc362..281f453 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2637,7 +2637,7 @@ struct drm_i915_cmd_table {
 /* WaRsDisableCoarsePowerGating:skl,bxt */
 #define NEEDS_WaRsDisableCoarsePowerGating(dev) (IS_BXT_REVID(dev, 0, BXT_REVID_A1) || \
 						 ((IS_SKL_GT3(dev) || IS_SKL_GT4(dev)) && \
-						  IS_SKL_REVID(dev, 0, SKL_REVID_F0)))
+						  IS_SKL_REVID(dev, 0, SKL_REVID_E0)))
 /*
  * dp aux and gmbus irq on gen4 seems to be able to generate legacy interrupts
  * even when in MSI mode. This results in spurious interrupt warnings if the
-- 
1.9.1