[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Splitting intel_dp_detect

Mon Apr 4 11:08:26 UTC 2016

On Mon, 04 Apr 2016, Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com> wrote:
> On 01/04/16 08:41, Ander Conselvan De Oliveira wrote:
>> On Thu, 2016-03-31 at 12:38 +0000, Patchwork wrote:
>>> == Series Details ==
>>>
>>> Series: series starting with [1/5] drm/i915: Splitting intel_dp_detect
>>> URL   : https://patchwork.freedesktop.org/series/5044/
>>> State : success
>> 
>> I pushed those to dinq.
>
> This series seems to break eDP detection on BDW RVP.

I presume this is due to the sink count check. Can you add debug logging
to print intel_dp->sink_count after it's been read in
intel_dp_get_dpcd() please?

Then the question is, is this just because you have an RVP with who
knows what panel, or do we have to take into account potentially broken
panels too? Then I assume the fix would be to to ignore sink count for
eDP.

BR,
Jani.

>
> Old kernel:
>
> [    1.554183] [drm:intel_dp_init_connector] Adding eDP connector on port A
> [    1.554245] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 2000 t8 0 t9 2000 t10 500 t11_t12 6000
> [    1.554254] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000
> [    1.554263] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600
> [    1.554271] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 200
> [    1.554279] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
> [    1.554530] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
> [    1.554562] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
> [    1.556670] [drm:intel_dp_get_dpcd] DPCD: 11 0a 02 00 00 00 00 00 00 00 00 00 00 00 00
> [    1.557617] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink no
> [    1.557627] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
> [    1.557633] [drm:intel_dp_print_rates] sink rates: 162000, 270000
> [    1.557638] [drm:intel_dp_print_rates] common rates: 162000, 270000
> [    1.557651] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06
> [    1.567299] [drm:drm_edid_to_eld] ELD: no CEA Extension found
> [    1.567308] [drm:intel_dp_drrs_init] VBT doesn't support DRRS
> [    1.567319] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 937/937
>
>
> Todays nightly:
>
> [    4.306321] [drm:intel_dp_init_connector] Adding eDP connector on port A
> [    4.306370] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 2000 t8 0 t9 2000 t10 500 t11_t12 6000
> [    4.306371] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000
> [    4.306373] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600
> [    4.306374] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 200
> [    4.306375] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
> [    4.306402] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
> [    4.306413] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
> [    4.319361] [drm:intel_dp_get_dpcd] DPCD: 11 0a 02 00 00 00 00 00 00 00 00 00 00 00 00
> [    4.331840] [drm] failed to retrieve link info, disabling eDP
> [    4.331862] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>
> Series reverted:
>
> [    4.770004] [drm:intel_dp_init_connector] Adding eDP connector on port A
> [    4.777651] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 2000 t8 0 t9 2000 t10 500 t11_t12 6000
> [    4.788222] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000
> [    4.798890] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600
> [    4.811424] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 200
> [    4.820705] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
> [    4.828631] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
> [    4.835061] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
> [    4.843757] [drm:intel_dp_get_dpcd] DPCD: 11 0a 02 00 00 00 00 00 00 00 00 00 00 00 00
> [    4.853032] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink no
> [    4.861624] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
> [    4.869551] [drm:intel_dp_print_rates] sink rates: 162000, 270000
> [    4.876558] [drm:intel_dp_print_rates] common rates: 162000, 270000
> [    4.883812] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06
> [    4.900522] asix 1-2:1.0 eth0: register 'asix' at usb-0000:00:14.0-2, ASIX AX88772 USB 2.0 Ethernet, b6:c3:97:fe:06:71
> [    4.905379] [drm:drm_edid_to_eld] ELD: no CEA Extension found
> [    4.905380] [drm:intel_dp_drrs_init] VBT doesn't support DRRS
> [    4.905385] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 937/937
>
> Regards,
>
> Tvrtko
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-- 
Jani Nikula, Intel Open Source Technology Center