[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Splitting intel_dp_detect
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Wed Apr 6 14:38:02 UTC 2016
On 04/04/16 12:41, Tvrtko Ursulin wrote:
>
> On 04/04/16 12:08, Jani Nikula wrote:
>> On Mon, 04 Apr 2016, Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
>> wrote:
>>> On 01/04/16 08:41, Ander Conselvan De Oliveira wrote:
>>>> On Thu, 2016-03-31 at 12:38 +0000, Patchwork wrote:
>>>>> == Series Details ==
>>>>>
>>>>> Series: series starting with [1/5] drm/i915: Splitting intel_dp_detect
>>>>> URL : https://patchwork.freedesktop.org/series/5044/
>>>>> State : success
>>>>
>>>> I pushed those to dinq.
>>>
>>> This series seems to break eDP detection on BDW RVP.
>>
>> I presume this is due to the sink count check. Can you add debug logging
>> to print intel_dp->sink_count after it's been read in
>> intel_dp_get_dpcd() please?
>
> intel_dp->sink_count is zero here. (raw value, before the
> DP_GET_SINK_COUNT.)
>
> Also, intel_dp_dpcd_read_wake suggests a possibility for reading garbage
> with not overly confident wording for the workaround there.
>
>> Then the question is, is this just because you have an RVP with who
>> knows what panel, or do we have to take into account potentially broken
>> panels too? Then I assume the fix would be to to ignore sink count for
>> eDP.
>
> No idea. :)
I could really use a solution for this. My only development platform is
incapacitated unless I revert this series which, apart from the extra
work when preparing and sending out patches this is taking, including
lost time waiting on CI which I suspect dislikes patches from top of
unknown bases, I think it won't be so easy to continue doing so when the
conflicts start arriving. :(
Regards,
Tvrtko
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