[Intel-gfx] [PATCH] RFC drm/i915: Emulate 64bit registers for residency counters
Ville Syrjälä
ville.syrjala at linux.intel.com
Thu Apr 7 14:17:52 UTC 2016
On Thu, Apr 07, 2016 at 02:58:01PM +0100, Chris Wilson wrote:
> On Thu, Apr 07, 2016 at 04:18:16PM +0300, Ville Syrjälä wrote:
> > On Thu, Apr 07, 2016 at 01:59:44PM +0100, Chris Wilson wrote:
> > > Can we set that bit ourselves? That puts the overflow into the 1 hour
> > > mark. Thanks,
> >
> > I don't know if it's safe to frob the bit. I worry that something
> > outside our control might depend on it staying put.
>
> A quick frob of the bit says that it is RO. When I try to set it, it
> doesn't stick. :(
Same here on my VLV. I was able to toggle it on my BSW. Perhaps
something can lock it down, and my BSW BIOS just doesn't do that.
--
Ville Syrjälä
Intel OTC
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