[Intel-gfx] [PATCH 1/3] drm/i915: Don't program eLLC IDI hash mask for gen9+

Chris Wilson chris at chris-wilson.co.uk
Fri Apr 8 12:08:01 UTC 2016


On Fri, Apr 08, 2016 at 02:54:03PM +0300, Mika Kuoppala wrote:
> For gen9 onwards, eDRAM is a true memory side cache. So
> there is no need to program idi has mask as it is for eLLC
> only.
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 5a65a7663b88..71db5ca04483 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4841,7 +4841,7 @@ i915_gem_init_hw(struct drm_device *dev)
>  	/* Double layer security blanket, see i915_gem_init() */
>  	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
>  
> -	if (dev_priv->ellc_size)
> +	if (dev_priv->ellc_size && INTEL_INFO(dev)->gen < 9)

INTEL_GEN(dev_priv) < 9
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


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