[Intel-gfx] [PATCH 2/3] drm/i915: Make sure LP1+ watermarks levels are preserved when going from 1 to 2 pipes

[Patrik Jakobsson]

On Fri, Apr 01, 2016 at 09:53:18PM +0300, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Once again ILK is unhappy if we clear out the LP1+ watermark levels
> outright, and instead we must disable the levels we don't want while
> still leaving the actual programmed watermark levels intact.
> 
> Fixes underruns on the already enabled pipe when programming watermarks
> while enabling the second pipe.
> 
> Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93787
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Patrik Jakobsson <patrik.jakobsson at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 9bc9c25423e9..a7fd5d464838 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2483,7 +2483,7 @@ static void ilk_wm_merge(struct drm_device *dev,
>  	/* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */
>  	if ((INTEL_INFO(dev)->gen <= 6 || IS_IVYBRIDGE(dev)) &&
>  	    config->num_pipes_active > 1)
> -		return;
> +		last_enabled_level = 0;
>  
>  	/* ILK: FBC WM must be disabled always */
>  	merged->fbc_wm_enabled = INTEL_INFO(dev)->gen >= 6;
> -- 
> 2.7.4
> 
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