[Intel-gfx] [PATCH] drm/i915: Use new i915_gem_object_pin_map for LRC

[Chris Wilson]

On Tue, Apr 12, 2016 at 09:52:28AM +0100, Tvrtko Ursulin wrote:
> -static void lrc_setup_hardware_status_page(struct intel_engine_cs *engine,
> -					   struct drm_i915_gem_object *default_ctx_obj)
> +static int
> +lrc_setup_hws(struct intel_engine_cs *engine,
> +	      struct drm_i915_gem_object *def_ctx_obj)
>  {
>  	struct drm_i915_private *dev_priv = engine->dev->dev_private;
> -	struct page *page;
> +	void *hws;
>  
>  	/* The HWSP is part of the default context object in LRC mode. */
> -	engine->status_page.gfx_addr = i915_gem_obj_ggtt_offset(default_ctx_obj)
> -			+ LRC_PPHWSP_PN * PAGE_SIZE;
> -	page = i915_gem_object_get_page(default_ctx_obj, LRC_PPHWSP_PN);
> -	engine->status_page.page_addr = kmap(page);
> -	engine->status_page.obj = default_ctx_obj;
> +	engine->status_page.gfx_addr = i915_gem_obj_ggtt_offset(def_ctx_obj) +
> +				       LRC_PPHWSP_PN * PAGE_SIZE;
> +	hws = i915_gem_object_pin_map(def_ctx_obj);
> +	if (IS_ERR(hws))
> +		return PTR_ERR(hws);
> +	engine->status_page.page_addr = hws + LRC_PPHWSP_PN * PAGE_SIZE;
> +	engine->status_page.obj = def_ctx_obj;
>  
>  	I915_WRITE(RING_HWS_PGA(engine->mmio_base),
> -			(u32)engine->status_page.gfx_addr);
> +		   (u32)engine->status_page.gfx_addr);
>  	POSTING_READ(RING_HWS_PGA(engine->mmio_base));
> +
> +	return 0;
>  }

I don't see the corresonding change for tearing down the hws.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre