[Intel-gfx] [PATCHv3 2/4] drm/i915: Store the dpll config in crtc_state->shared_dpll

[R, Durgadoss]

>-----Original Message-----
>From: Conselvan De Oliveira, Ander
>Sent: Monday, April 11, 2016 6:07 PM
>To: intel-gfx at lists.freedesktop.org; R, Durgadoss <durgadoss.r at intel.com>
>Cc: ville.syrjala at linux.intel.com
>Subject: Re: [PATCHv3 2/4] drm/i915: Store the dpll config in crtc_state->shared_dpll
>
>On Wed, 2016-04-06 at 17:23 +0530, Durgadoss R wrote:
>> Currently, the required shared dpll is saved in the crtc_state.
>> Similarly, this patch saves the dpll config values also, so that
>> these values (through crtc_state->shared_dpll->config.hw_state)
>> can be used for upfront link training.
>>
>> Signed-off-by: Durgadoss R <durgadoss.r at intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_dpll_mgr.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
>> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
>> index 1175eeb..cad10f2 100644
>> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
>> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
>> @@ -248,6 +248,7 @@ intel_reference_shared_dpll(struct intel_shared_dpll *pll,
>>  			 pipe_name(crtc->pipe));
>>
>>  	intel_shared_dpll_config_get(shared_dpll, pll, crtc);
>> +	crtc_state->shared_dpll->config = shared_dpll[i];
>
>This overwrites the state stored in dev_priv->shared_dpll[i].config, so it means
>we loose the current state set in the hardware. If the atomic check fails after
>this, the software tracking of the hw state gets messed up.

But we need the computed dpll_state and crtc_mask set for pll enabling.
So, the only other way I see is to call shared_dpll_commit() in ddi_upfront() code
after we do get_shared_dpll(). 
What do you think of this ?

Or any other options ?

Thanks,
Durga

>
>Ander
>
>>  }
>>
>>  void intel_shared_dpll_commit(struct drm_atomic_state *state)