[Intel-gfx] [PATCH 2/5] drm/i915: harden allocation paths in allocate_va_range
Matthew Auld
matthew.auld at intel.com
Tue Apr 12 15:57:40 UTC 2016
For the gen6/gen8_allocate_va_range functions remove the WARN_ON range
sanity checks in favour of simply hardening the allocation paths. This
also fixes the inconsistency in which we don't always handle the
potential overflow in our checks.
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Signed-off-by: Matthew Auld <matthew.auld at intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 17 ++++-------------
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5ed713d..fa583d5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1220,15 +1220,6 @@ static int gen8_alloc_va_range_3lvl(struct i915_address_space *vm,
uint32_t pdpes = I915_PDPES_PER_PDP(dev);
int ret;
- /* Wrap is never okay since we can only represent 48b, and we don't
- * actually use the other side of the canonical address space.
- */
- if (WARN_ON(start + length < start))
- return -ENODEV;
-
- if (WARN_ON(start + length > vm->total))
- return -ENODEV;
-
ret = alloc_gen8_temp_bitmaps(&new_page_dirs, &new_page_tables, pdpes);
if (ret)
return ret;
@@ -1370,6 +1361,8 @@ static int gen8_alloc_va_range(struct i915_address_space *vm,
{
struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
+ length = min_t(uint64_t, length, vm->total);
+
if (USES_FULL_48BIT_PPGTT(vm->dev))
return gen8_alloc_va_range_4lvl(vm, &ppgtt->pml4, start, length);
else
@@ -1860,11 +1853,9 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
uint32_t pde, temp;
int ret;
- if (WARN_ON(start_in + length_in > ppgtt->base.total))
- return -ENODEV;
-
start = start_save = start_in;
- length = length_save = length_in;
+ length = length_save = length_in = min_t(uint64_t, length_in,
+ ppgtt->base.total);
bitmap_zero(new_page_tables, I915_PDES);
--
2.4.11
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