[Intel-gfx] [PATCH 1/3] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr

Tvrtko Ursulin tvrtko.ursulin at linux.intel.com
Wed Apr 13 12:10:45 UTC 2016


On 13/04/16 10:52, Chris Wilson wrote:
> When setting up the overlay page, we pin it into the GGTT (when using
> virtual addresses) and store the offset as overlay->flip_addr. Rather
> than doing a lookup of the GGTT address everytime, we can use the known
> address instead.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
> ---
>   drivers/gpu/drm/i915/intel_overlay.c | 9 +++------
>   1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index 6694e9230cd5..e487ff18b42f 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -198,7 +198,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)
>   		regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr;
>   	else
>   		regs = io_mapping_map_wc(ggtt->mappable,
> -					 i915_gem_obj_ggtt_offset(overlay->reg_bo));
> +					 overlay->flip_addr);
>
>   	return regs;
>   }
> @@ -1493,7 +1493,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
>   			overlay->reg_bo->phys_handle->vaddr;
>   	else
>   		regs = io_mapping_map_atomic_wc(ggtt->mappable,
> -						i915_gem_obj_ggtt_offset(overlay->reg_bo));
> +						overlay->flip_addr);
>
>   	return regs;
>   }
> @@ -1523,10 +1523,7 @@ intel_overlay_capture_error_state(struct drm_device *dev)
>
>   	error->dovsta = I915_READ(DOVSTA);
>   	error->isr = I915_READ(ISR);
> -	if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
> -		error->base = (__force long)overlay->reg_bo->phys_handle->vaddr;
> -	else
> -		error->base = i915_gem_obj_ggtt_offset(overlay->reg_bo);
> +	error->base = overlay->flip_addr;
>
>   	regs = intel_overlay_map_regs_atomic(overlay);
>   	if (!regs)
>

I don't know this code, so I explored a bit and the patch looks correct.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko


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