[Intel-gfx] [PATCH 0/5] PowerManagement Toggle for PowerTOP

[Zanoni, Paulo R]

Em Ter, 2016-04-12 às 12:18 -0700, Alexandra Yates escreveu:
> This project is explained in detail on the HAS
> https://docs.google.com/a/intel.com/document/d/1E-en_xqfHgCnhD1Tes3f0
> 8UYrOc-etv2W-pU0ZErKdE/edit?usp=sharing  
> 
> Summary: 
> Permits the user to identify and toggle values for PSR, FBC, RC6,
> DRRS, and IPS
> under /sys/class/drm/card0/power/.  By enabling these features I'm
> looking to
> empower our customers, such as, power team, chrome OS, and platform
> integration teams
> to debug graphics power management features. 
> 
> From the current patchset PSR, FBC, RC6, and, DRRS are complete and
> past BAT, modset,
> and suspend/resume tests.  For IPS I'm looking for feedback since IPS
> seems to change
> during runtime dynamically.  Additionally, as a future project IPS
> would be better 
> served if it is implemented by using the atomic check, pre-commit,
> commit, post-commit,
> a good example of this is the PSR enable/disable implementation.
> 
> For this project to be completed needs to have in place the following
> components:
> (Need to be developed)
> * IPS toggle interface flesh-out
> * Tests added to intel-gpu-tools repo
> * Documentation for all sysfs added interfaces
> * PowerTOP component named: GFX-TOP. With the following requirements:
> 	* It would be available only to developers
> 	* It would allow the developers to toggle the interfaces from
> 	  the PowerTOP user interface.  
> 	* It would show the Power Consumption impact of toggling on and
> off
> 	  these settings.      
>      

A small suggestion:

In the past, I've seen people testing i915.ko power saving features
just by "toggling" the features through the i915 module parameters
without doing anything else. In most of these cases, the machine was
not properly configured for power savings, so the conclusion was often
that the feature didn't save any power. While this was true (toggling
the feature didn't save any power), these people would have reached
different conclusions if they had, for example, changed their disk
power management policies. Do we have any sort of plan to try to
educate the powertop/gfxtop users regarding these things?

Maybe the powertop/gfxtop interface could expose some very-easy-to-
reach text explaining these things.


> Your review of this patchset is intended to contribute to its full
> maturity so that when we reach the PowerTOP development all pieces
> would
> be ready for commit.  
> 
> Thank you in advance,
> 
> Alexandra Yates (5):
>   drm/i915: Add sys PSR toggle interface
>   drm/i915: Add sys FBC toggle interface
>   drm/i915: Add sys RC6 toggle interface
>   drm/i915: Add sys drrs toggle interface
>   drm-i915: Add sys IPS toggle interface
> 
>  drivers/gpu/drm/i915/i915_debugfs.c  |   5 +-
>  drivers/gpu/drm/i915/i915_drv.c      |   5 +-
>  drivers/gpu/drm/i915/i915_drv.h      |  12 ++
>  drivers/gpu/drm/i915/i915_sysfs.c    | 362
> ++++++++++++++++++++++++++++++++++-
>  drivers/gpu/drm/i915/intel_color.c   |  12 +-
>  drivers/gpu/drm/i915/intel_ddi.c     |  15 +-
>  drivers/gpu/drm/i915/intel_display.c |  55 ++++--
>  drivers/gpu/drm/i915/intel_dp.c      |  48 +++--
>  drivers/gpu/drm/i915/intel_drv.h     |  21 +-
>  drivers/gpu/drm/i915/intel_fbc.c     |  29 ++-
>  drivers/gpu/drm/i915/intel_pm.c      |  53 ++++-
>  drivers/gpu/drm/i915/intel_psr.c     |  36 +++-
>  12 files changed, 588 insertions(+), 65 deletions(-)
>