[Intel-gfx] [PATCH v2] drm/i915:bxt: implement WaProgramL3SqcReg1DefaultForPerf

Gore, Tim tim.gore at intel.com
Wed Apr 20 15:51:49 UTC 2016


Tim GoreĀ 
Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ


> -----Original Message-----
> From: Thierry, Michel
> Sent: Wednesday, April 20, 2016 4:00 PM
> To: Gore, Tim; intel-gfx at lists.freedesktop.org
> Subject: Re: [PATCH v2] drm/i915:bxt: implement
> WaProgramL3SqcReg1DefaultForPerf
> 
> On 4/20/2016 3:23 PM, tim.gore at intel.com wrote:
> > From: Tim Gore <tim.gore at intel.com>
> >
> > This patch applies a performance enhancement workaround based on
> > analysis of DX and OCL S-Curve workloads.
> >
> > v2: Only apply to B0 onwards
> >
> > Signed-off-by: Tim Gore <tim.gore at intel.com>
> > ---
> >   drivers/gpu/drm/i915/i915_reg.h | 1 +
> >   drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> >   2 files changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h index f0a6d85..13e154a 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -6074,6 +6074,7 @@ enum skl_disp_power_wells {
> >
> >   #define GEN8_L3SQCREG1				_MMIO(0xB100)
> >   #define  BDW_WA_L3SQCREG1_DEFAULT		0x784000
> > +#define  BXT_WA_L3SQCREG1_DEFAULT		0xF84000
> >
> >   #define GEN7_L3CNTLREG1				_MMIO(0xB01C)
> >   #define  GEN7_WA_FOR_GEN7_L3_CONTROL
> 	0x3C47FF8C
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c index b7c2186..eecdc3a6 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -76,6 +76,10 @@ static void bxt_init_clock_gating(struct drm_device
> *dev)
> >   	if (IS_BXT_REVID(dev_priv, BXT_REVID_B0, REVID_FOREVER))
> >   		I915_WRITE(GEN9_CLKGATE_DIS_0,
> I915_READ(GEN9_CLKGATE_DIS_0) |
> >   			   PWM1_GATING_DIS | PWM2_GATING_DIS);
> > +
> > +	/* WaProgramL3SqcReg1DefaultForPerf:bxt */
> > +	if (IS_BXT_REVID(dev, BXT_REVID_B0, REVID_FOREVER))
> > +		I915_WRITE(GEN8_L3SQCREG1,
> BXT_WA_L3SQCREG1_DEFAULT);
> >   }
> >
> >   static void i915_pineview_get_mem_freq(struct drm_device *dev)
> >
> 
> Isnt it better to add this to bxt_init_workarounds() instead of
> bxt_init_clock_gating()?

There is an equivalent Wa for bdw in bdw_init_clock_gating, so I just tried to
stay consistent with that. I'm not sure if this W/a will persist across
suspend/resume. bxt_init_workarounds only gets called after reset, not
on resume as far as I know. I'll investigate further
> 
> And It doesnt hurt to put what it is doing in the commit msg, i.e.:
> "Increasing GP credits to 62 (from default 56), and reducing HP credits to 2
> (from default 8)"
Fair comment
> 
> -Michel



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