[Intel-gfx] ✗ Fi.CI.BAT: failure for Unduplicate CHV phy code (rev4)

[Patchwork]

== Series Details ==

Series: Unduplicate CHV phy code (rev4)
URL   : https://patchwork.freedesktop.org/series/5463/
State : failure

== Summary ==

Series 5463v4 Unduplicate CHV phy code
http://patchwork.freedesktop.org/api/1.0/series/5463/revisions/4/mbox/

Test drv_module_reload_basic:
                pass       -> INCOMPLETE (skl-nuci5)
Test kms_force_connector_basic:
        Subgroup force-load-detect:
                pass       -> SKIP       (snb-x220t)
        Subgroup prune-stale-modes:
                pass       -> SKIP       (ilk-hp8440p)

bdw-nuci7        total:193  pass:181  dwarn:0   dfail:0   fail:0   skip:12 
bdw-ultra        total:193  pass:170  dwarn:0   dfail:0   fail:0   skip:23 
bsw-nuc-2        total:192  pass:153  dwarn:0   dfail:0   fail:0   skip:39 
byt-nuc          total:192  pass:154  dwarn:0   dfail:0   fail:0   skip:38 
ilk-hp8440p      total:193  pass:135  dwarn:0   dfail:0   fail:0   skip:58 
ivb-t430s        total:193  pass:165  dwarn:0   dfail:0   fail:0   skip:28 
skl-i7k-2        total:193  pass:168  dwarn:0   dfail:0   fail:0   skip:25 
skl-nuci5        total:171  pass:159  dwarn:0   dfail:0   fail:0   skip:11 
snb-dellxps      total:193  pass:155  dwarn:0   dfail:0   fail:0   skip:38 
snb-x220t        total:193  pass:154  dwarn:0   dfail:0   fail:1   skip:38 

Results at /archive/results/CI_IGT_test/Patchwork_2016/

340c485ad98d0ec0369a3b18d4a09938f3f5537d drm-intel-nightly: 2016y-04m-22d-17h-32m-25s UTC integration manifest
616d6c5 drm/i915: Move VLV HDMI lane reset work around logic to intel_dpio_phy.c
f816a5b drm/i915: Unduplicate pre encoder enabling phy code
a2549b5 drm/i915: Unduplicate VLV phy pre pll enabling code
5039193 drm/i915: Unduplicate VLV signal level code
13874b7 drm/i915: Unduplicate CHV encoders' post pll disable code
d3a34e4 drm/i915: Unduplicate CHV pre-encoder enabling phy logic
0a2509b drm/i915: Unduplicate CHV phy-releated pre pll enabling code
e30171a drm/i915: Unduplicate chv_data_lane_soft_reset()
0ffec1a drm/i915: Unduplicate CHV signal level code
33d5a9a drm/i915: Set crtc_state->lane_count for HDMI