[Intel-gfx] [PATCH] drm/atomic: Always allow async support for the atomic ioctl.
Daniel Vetter
daniel at ffwll.ch
Mon Apr 25 09:35:36 UTC 2016
On Mon, Apr 25, 2016 at 11:21 AM, Maarten Lankhorst
<maarten.lankhorst at linux.intel.com> wrote:
> async_page_flip is a unrelated flag and should not be used for
> testing support. It's up to the drivers to fail if they don't
> support async commit.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
Once more (summary of our irc discussion):
- DRM_MODE_PAGE_FLIP_ASYNC = flipping with tearing, i.e. not vblank
synced. Gives you lower latency and unrestricted rendering, aka
benchmark mode. Needs special hw support and on intel only supported
on the primary plane. I think a better way to almost get all the
benefits of async by simply implementing a queue of flips that all get
collapsed to the next vblank.
- async atomic commit = non-blocking ioctl.
Two entirely orthogonal things (you could do blocking atomic commit
with async flip, but doesn't make much sense).
Maybe instead we need a better documentation for the FLIP_ASYNC flag?
-Daniel
> ---
> drivers/gpu/drm/drm_atomic.c | 4 ----
> 1 file changed, 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 984567057688..af8957b60388 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1587,10 +1587,6 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
> if (arg->reserved)
> return -EINVAL;
>
> - if ((arg->flags & DRM_MODE_PAGE_FLIP_ASYNC) &&
> - !dev->mode_config.async_page_flip)
> - return -EINVAL;
> -
> /* can't test and expect an event at the same time. */
> if ((arg->flags & DRM_MODE_ATOMIC_TEST_ONLY) &&
> (arg->flags & DRM_MODE_PAGE_FLIP_EVENT))
> --
> 2.1.0
>
> _______________________________________________
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
More information about the Intel-gfx
mailing list