[Intel-gfx] [PATCH v5 1/3] drm/i915/dsi: add support for sequence block v3 gpio for VLV

[Ville Syrjälä]

On Tue, Apr 26, 2016 at 01:27:39PM +0300, Jani Nikula wrote:
> Only support NC GPIOs for now, and assume the vlv gpio table only has NC
> GPIOs for now.
> 
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index c7281c391d0f..a1cc8533cff5 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -203,8 +203,8 @@ static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
>  	map = &vlv_gpio_table[gpio_index];
>  
>  	if (dev_priv->vbt.dsi.seq_version >= 3) {
> -		DRM_DEBUG_KMS("GPIO element v3 not supported\n");
> -		return;
> +		/* XXX: this assumes vlv_gpio_table only has NC GPIOs. */
> +		port = IOSF_PORT_GPIO_NC;

NC GPIOs start from index 0, and we accept them up to ARRAY_SIZE(vlv_gpio_table)
which only holds NC GPIOs as the comment says. Since SC GPIOs would come after
NC GPIOS in index, they would thus have been rejected already by the earlier
check. Makes sense, but I had to actually read the code to see it.

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

>  	} else {
>  		if (gpio_source == 0) {
>  			port = IOSF_PORT_GPIO_NC;
> -- 
> 2.1.4

-- 
Ville Syrjälä
Intel OTC