[Intel-gfx] [PATCH v6 16/25] drm/i915: Update execlists context descriptor format commentary

[Tvrtko Ursulin]

On 26/04/16 21:06, Chris Wilson wrote:
> The comments describing the Context Descriptor Format are off by a bit
> for the size of the context ID.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Dave Gordon <david.s.gordon at intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c | 11 ++++++-----
>   1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index b5c2c1931a5f..5d8ee9059eee 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -305,10 +305,11 @@ logical_ring_init_platform_invariants(struct intel_engine_cs *engine)
>    * which remains valid until the context is unpinned.
>    *
>    * This is what a descriptor looks like, from LSB to MSB:
> - *    bits 0-11:    flags, GEN8_CTX_* (cached in ctx_desc_template)
> + *    bits  0-11:    flags, GEN8_CTX_* (cached in ctx_desc_template)
>    *    bits 12-31:    LRCA, GTT address of (the HWSP of) this context
> - *    bits 32-51:    ctx ID, a globally unique tag (the LRCA again!)
> - *    bits 52-63:    reserved, may encode the engine ID (for GuC)
> + *    bits 32-52:    ctx ID, a globally unique tag (the LRCA again!)
> + *    bits 53-54:    mbz, reserved for use by hardware
> + *    bits 55-63:    group ID, currently unused and set to 0
>    */
>   static void
>   intel_lr_context_descriptor_update(struct intel_context *ctx,
> @@ -319,9 +320,9 @@ intel_lr_context_descriptor_update(struct intel_context *ctx,
>   	lrca = ctx->engine[engine->id].lrc_vma->node.start +
>   	       LRC_PPHWSP_PN * PAGE_SIZE;
>
> -	desc = engine->ctx_desc_template;			   /* bits  0-11 */
> +	desc = engine->ctx_desc_template;		   /* bits  0-11 */
>   	desc |= lrca;					   /* bits 12-31 */
> -	desc |= (lrca >> PAGE_SHIFT) << GEN8_CTX_ID_SHIFT; /* bits 32-51 */
> +	desc |= (lrca >> PAGE_SHIFT) << GEN8_CTX_ID_SHIFT; /* bits 32-52 */
>
>   	ctx->engine[engine->id].lrc_desc = desc;
>   }
>

Verified against the docs and it is correct.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko