[Intel-gfx] [PATCH 20/21] drm/i915/slpc: Add i915_slpc_info to debugfs

tom.orourke at intel.com tom.orourke at intel.com
Thu Apr 28 01:11:04 UTC 2016


From: Tom O'Rourke <Tom.O'Rourke at intel.com>

i915_slpc_info shows the contents of SLPC shared data
parsed into text format.

v2: reformat slpc info (Radek)
    squashed query task state info
    in slpc info, kunmap before seq_print (Paulo)
    return void instead of ignored return value (Paulo)
v3: Avoid magic numbers and use local variables (Jon Bloomfield)

Signed-off-by: Tom O'Rourke <Tom.O'Rourke at intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 184 ++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_slpc.c   |  23 +++++
 drivers/gpu/drm/i915/intel_slpc.h   |   3 +
 3 files changed, 210 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 8b39a13..5f3780c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1404,6 +1404,189 @@ static const struct file_operations i915_slpc_dcc_fops = {
 	.llseek	 = seq_lseek
 };
 
+static int i915_slpc_info(struct seq_file *m, void *unused)
+{
+	struct drm_info_node *node = m->private;
+	struct drm_device *dev = node->minor->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct drm_i915_gem_object *obj;
+	struct page *page;
+	void *pv = NULL;
+	struct slpc_shared_data data;
+	int i, value;
+	enum slpc_global_state global_state;
+	enum slpc_platform_sku platform_sku;
+	enum slpc_host_os host_os;
+	enum slpc_power_plan power_plan;
+	enum slpc_power_source power_source;
+
+	obj = dev_priv->guc.slpc.shared_data_obj;
+	if (obj) {
+		intel_slpc_query_task_state(dev);
+
+		page = i915_gem_object_get_page(obj, 0);
+		if (page)
+			pv = kmap_atomic(page);
+	}
+
+	if (pv) {
+		data = *(struct slpc_shared_data *) pv;
+		kunmap_atomic(pv);
+
+		seq_printf(m, "SLPC Version: %d.%d.%d (0x%8x)\n",
+			   data.slpc_version >> 16,
+			   (data.slpc_version >> 8) & 0xFF,
+			   data.slpc_version & 0xFF,
+			   data.slpc_version);
+		seq_printf(m, "shared data size: %d\n", data.shared_data_size);
+
+		global_state = (enum slpc_global_state) data.global_state;
+		seq_printf(m, "global state: %d (", global_state);
+		switch (global_state) {
+		case SLPC_GLOBAL_STATE_NOT_RUNNING:
+			seq_puts(m, "not running)\n");
+			break;
+		case SLPC_GLOBAL_STATE_INITIALIZING:
+			seq_puts(m, "initializing)\n");
+			break;
+		case SLPC_GLOBAL_STATE_RESETTING:
+			seq_puts(m, "resetting)\n");
+			break;
+		case SLPC_GLOBAL_STATE_RUNNING:
+			seq_puts(m, "running)\n");
+			break;
+		case SLPC_GLOBAL_STATE_SHUTTING_DOWN:
+			seq_puts(m, "shutting down)\n");
+			break;
+		case SLPC_GLOBAL_STATE_ERROR:
+			seq_puts(m, "error)\n");
+			break;
+		default:
+			seq_puts(m, "unknown)\n");
+			break;
+		}
+
+		platform_sku = (enum slpc_platform_sku)
+				data.platform_info.platform_sku;
+		seq_printf(m, "sku: %d (", platform_sku);
+		switch (platform_sku) {
+		case SLPC_PLATFORM_SKU_UNDEFINED:
+			seq_puts(m, "undefined)\n");
+			break;
+		case SLPC_PLATFORM_SKU_ULX:
+			seq_puts(m, "ULX)\n");
+			break;
+		case SLPC_PLATFORM_SKU_ULT:
+			seq_puts(m, "ULT)\n");
+			break;
+		case SLPC_PLATFORM_SKU_T:
+			seq_puts(m, "T)\n");
+			break;
+		case SLPC_PLATFORM_SKU_MOBL:
+			seq_puts(m, "Mobile)\n");
+			break;
+		case SLPC_PLATFORM_SKU_DT:
+			seq_puts(m, "DT)\n");
+			break;
+		case SLPC_PLATFORM_SKU_UNKNOWN:
+		default:
+			seq_puts(m, "unknown)\n");
+			break;
+		}
+		seq_printf(m, "slice count: %d\n",
+			   data.platform_info.slice_count);
+
+		host_os = (enum slpc_host_os) data.platform_info.host_os;
+		seq_printf(m, "host OS: %d (", host_os);
+		switch (host_os) {
+		case SLPC_HOST_OS_UNDEFINED:
+			seq_puts(m, "undefined)\n");
+			break;
+		case SLPC_HOST_OS_WINDOWS_8:
+			seq_puts(m, "Windows 8)\n");
+			break;
+		default:
+			seq_puts(m, "unknown)\n");
+			break;
+		}
+
+		seq_printf(m, "power plan/source: 0x%x\n\tplan:\t",
+			   data.platform_info.power_plan_source);
+		power_plan = (enum slpc_power_plan) SLPC_POWER_PLAN(
+					data.platform_info.power_plan_source);
+		power_source = (enum slpc_power_source) SLPC_POWER_SOURCE(
+					data.platform_info.power_plan_source);
+		switch (power_plan) {
+		case SLPC_POWER_PLAN_UNDEFINED:
+			seq_puts(m, "undefined");
+			break;
+		case SLPC_POWER_PLAN_BATTERY_SAVER:
+			seq_puts(m, "battery saver");
+			break;
+		case SLPC_POWER_PLAN_BALANCED:
+			seq_puts(m, "balanced");
+			break;
+		case SLPC_POWER_PLAN_PERFORMANCE:
+			seq_puts(m, "performance");
+			break;
+		case SLPC_POWER_PLAN_UNKNOWN:
+		default:
+			seq_puts(m, "unknown");
+			break;
+		}
+		seq_puts(m, "\n\tsource:\t");
+		switch (power_source) {
+		case SLPC_POWER_SOURCE_UNDEFINED:
+			seq_puts(m, "undefined\n");
+			break;
+		case SLPC_POWER_SOURCE_AC:
+			seq_puts(m, "AC\n");
+			break;
+		case SLPC_POWER_SOURCE_DC:
+			seq_puts(m, "DC\n");
+			break;
+		case SLPC_POWER_SOURCE_UNKNOWN:
+		default:
+			seq_puts(m, "unknown\n");
+			break;
+		}
+
+		seq_printf(m, "IA frequency (MHz):\n\tP0: %d\n\tP1: %d\n\tPe: %d\n\tPn: %d\n",
+			   data.platform_info.P0_freq * 50,
+			   data.platform_info.P1_freq * 50,
+			   data.platform_info.Pe_freq * 50,
+			   data.platform_info.Pn_freq * 50);
+		seq_printf(m, "RAPL package power limits:\n\t0x%08x\n\t0x%08x\n",
+			   data.platform_info.package_rapl_limit_high,
+			   data.platform_info.package_rapl_limit_low);
+		seq_printf(m, "task state data: 0x%08x\n",
+			   data.task_state_data);
+		seq_printf(m, "\tturbo active: %d\n",
+			   (data.task_state_data & 1));
+		seq_printf(m, "\tdfps stall possible: %d\n\tgame mode: %d\n\tdfps target fps: %d\n",
+			   (data.task_state_data & 2),
+			   (data.task_state_data & 4),
+			   (data.task_state_data >> 3) & 0xFF);
+
+		seq_puts(m, "override parameter bitfield\n");
+		for (i = 0; i < SLPC_OVERRIDE_BITFIELD_SIZE; i++)
+			seq_printf(m, "%d: 0x%08x\n", i,
+				   data.override_parameters_set_bits[i]);
+
+		seq_puts(m, "override parameters (only non-zero shown)\n");
+		for (i = 0; i < SLPC_MAX_OVERRIDE_PARAMETERS; i++) {
+			value = data.override_parameters_values[i];
+			if (value)
+				seq_printf(m, "%d: 0x%8x\n", i, value);
+		}
+
+	} else {
+		seq_puts(m, "no SLPC info available\n");
+	}
+
+	return 0;
+}
+
 static int i915_frequency_info(struct seq_file *m, void *unused)
 {
 	struct drm_info_node *node = m->private;
@@ -5680,6 +5863,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
 	{"i915_guc_info", i915_guc_info, 0},
 	{"i915_guc_load_status", i915_guc_load_status_info, 0},
 	{"i915_guc_log_dump", i915_guc_log_dump, 0},
+	{"i915_slpc_info", i915_slpc_info, 0},
 	{"i915_frequency_info", i915_frequency_info, 0},
 	{"i915_hangcheck_info", i915_hangcheck_info, 0},
 	{"i915_drpc_info", i915_drpc_info, 0},
diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c
index 7b14a45..92e68ce 100644
--- a/drivers/gpu/drm/i915/intel_slpc.c
+++ b/drivers/gpu/drm/i915/intel_slpc.c
@@ -118,6 +118,23 @@ static void host2guc_slpc_unset_param(struct drm_device *dev,
 	host2guc_slpc(dev_priv, data, 3);
 }
 
+static void host2guc_slpc_query_task_state(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct drm_i915_gem_object *obj = dev_priv->guc.slpc.shared_data_obj;
+	u32 data[4];
+	u64 shared_data_gtt_offset = i915_gem_obj_ggtt_offset(obj);
+
+	data[0] = HOST2GUC_ACTION_SLPC_REQUEST;
+	data[1] = SLPC_EVENT(SLPC_EVENT_QUERY_TASK_STATE, 2);
+	data[2] = lower_32_bits(shared_data_gtt_offset);
+	data[3] = upper_32_bits(shared_data_gtt_offset);
+
+	WARN_ON(0 != data[3]);
+
+	host2guc_slpc(dev_priv, data, 4);
+}
+
 static u8 slpc_get_platform_sku(struct drm_i915_gem_object *obj)
 {
 	struct drm_device *dev = obj->base.dev;
@@ -491,3 +508,9 @@ void intel_slpc_get_param(struct drm_device *dev, enum slpc_param_id id,
 		kunmap_atomic(data);
 	}
 }
+
+void intel_slpc_query_task_state(struct drm_device *dev)
+{
+	if (intel_slpc_active(dev))
+		host2guc_slpc_query_task_state(dev);
+}
diff --git a/drivers/gpu/drm/i915/intel_slpc.h b/drivers/gpu/drm/i915/intel_slpc.h
index a7b2be8..95c8218 100644
--- a/drivers/gpu/drm/i915/intel_slpc.h
+++ b/drivers/gpu/drm/i915/intel_slpc.h
@@ -134,6 +134,8 @@ enum slpc_power_source {
 };
 
 #define SLPC_POWER_PLAN_SOURCE(plan, source) ((plan) | ((source) << 6))
+#define SLPC_POWER_PLAN(plan_source) ((plan_source) & 0x3F)
+#define SLPC_POWER_SOURCE(plan_source) ((plan_source) >> 6)
 
 struct slpc_platform_info {
 	u8 platform_sku;
@@ -211,4 +213,5 @@ void intel_slpc_set_param(struct drm_device *dev, enum slpc_param_id id,
 			  u32 value);
 void intel_slpc_get_param(struct drm_device *dev, enum slpc_param_id id,
 			  int *overriding, u32 *value);
+void intel_slpc_query_task_state(struct drm_device *dev);
 #endif
-- 
1.9.1



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