[Intel-gfx] [PATCH] drm/i915/gen9: Update the forcewake range

Kamble, Sagar A sagar.a.kamble at intel.com
Fri Apr 29 04:53:03 UTC 2016


Reviewed-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>

On 4/29/2016 9:54 AM, akash.goel at intel.com wrote:
> From: Akash Goel <akash.goel at intel.com>
>
> Update made to the Gen9 forcewake range to cover the OA registers.
> MMIO locations 0x2700-0x2FFF belong to the same power domain
> as 0x2000-0x26FF.
>
> Signed-off-by: Akash Goel <akash.goel at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_uncore.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 4f1dfe6..7387426 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -699,8 +699,7 @@ static bool is_gen8_shadowed(u32 offset)
>   	REG_RANGE((reg), 0xB00,  0x2000)
>   
>   #define FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(reg) \
> -	(REG_RANGE((reg), 0x2000, 0x2700) || \
> -	 REG_RANGE((reg), 0x3000, 0x4000) || \
> +	(REG_RANGE((reg), 0x2000, 0x4000) || \
>   	 REG_RANGE((reg), 0x5200, 0x8000) || \
>   	 REG_RANGE((reg), 0x8140, 0x8160) || \
>   	 REG_RANGE((reg), 0x8300, 0x8500) || \



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