[Intel-gfx] [PATCH 06/10] drm/i915: Bump reserved size for legacy gen8 semaphore emission

[Joonas Lahtinen]

On to, 2016-04-28 at 17:24 +0100, Chris Wilson wrote:
> With 5 rings and a flush, we need 192 bytes of space to emit the
> breadcrumb and semaphores. However, we need some spare room the size of
> the single largest packet (36 dwords, 144 bytes) to accommodate
> wraparound giving a grand total of 336 bytes
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

Based on the IRC discussion, seems reasonable.

Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.h | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 2651fd5263eb..dbf64f8a2356 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -484,10 +484,10 @@ static inline u32 intel_ring_get_tail(struct intel_ringbuffer *ringbuf)
>  /*
>   * Arbitrary size for largest possible 'add request' sequence. The code paths
>   * are complex and variable. Empirical measurement shows that the worst case
> - * is ILK at 136 words. Reserving too much is better than reserving too little
> - * as that allows for corner cases that might have been missed. So the figure
> - * has been rounded up to 160 words.
> + * is BDW at 192 bytes (6 + 6 + 36 dwords), then ILK at 136 bytes. However,
> + * we need to allocate double the largest single packet within that emission
> + * to account for tail wraparound (so 6 + 6 + 72 dwords for BDW).
>   */
> -#define MIN_SPACE_FOR_ADD_REQUEST	160
> +#define MIN_SPACE_FOR_ADD_REQUEST 336
>  
>  #endif /* _INTEL_RINGBUFFER_H_ */
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation