[Intel-gfx] [Beignet] [Patch V3] intel: Export pooled EU and min no. of eus in a pool.
Arun Siluvery
arun.siluvery at linux.intel.com
Tue Aug 2 10:38:34 UTC 2016
On 02/08/2016 07:20, Yang, Rong R wrote:
> I sent a new version, could you check this and give comments/ACK?
>
Cc: Daniel, intel-gfx mailing list.
regards
Arun
> Thanks,
> Yang Rong
>
>> -----Original Message-----
>> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of
>> Yang Rong
>> Sent: Tuesday, August 2, 2016 15:51
>> To: beignet at lists.freedesktop.org; dri-devel at lists.freedesktop.org
>> Cc: Yang, Rong R <rong.r.yang at intel.com>
>> Subject: [Beignet] [Patch V3] intel: Export pooled EU and min no. of eus in a
>> pool.
>>
>> Update kernel interface with new I915_GETPARAM ioctl entries for pooled
>> EU and min no. of eus in a pool. Add a wrapping function for each parameter.
>> Userspace drivers need these values when decide the thread count. This
>> kernel enabled pooled eu by default for BXT and for fused down 2x6 parts it
>> is advised to turn it off.
>>
>> But there is another HW issue in these parts (fused down 2x6 parts) before
>> C0 that requires Pooled EU to be enabled as a workaround. In this case the
>> pool configuration changes depending upon which subslice is disabled and
>> the no. of eus in a pool is different, So userspace need to know min no. of
>> eus in a pool.
>>
>> V2: use return value as the query results.
>> ret < 0 when error, ret = 0 when not support, and ret > 0 indicate
>> query results.(Chris)
>> V3: Correct V2 errors.
>>
>> Signed-off-by: Yang Rong <rong.r.yang at intel.com>
>> ---
>> include/drm/i915_drm.h | 2 ++
>> intel/intel_bufmgr.h | 3 +++
>> intel/intel_bufmgr_gem.c | 30 ++++++++++++++++++++++++++++++
>> 3 files changed, 35 insertions(+)
>>
>> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index
>> c4ce6b2..eb611a7 100644
>> --- a/include/drm/i915_drm.h
>> +++ b/include/drm/i915_drm.h
>> @@ -357,6 +357,8 @@ typedef struct drm_i915_irq_wait {
>> #define I915_PARAM_HAS_GPU_RESET 35
>> #define I915_PARAM_HAS_RESOURCE_STREAMER 36
>> #define I915_PARAM_HAS_EXEC_SOFTPIN 37
>> +#define I915_PARAM_HAS_POOLED_EU 38
>> +#define I915_PARAM_MIN_EU_IN_POOL 39
>>
>> typedef struct drm_i915_getparam {
>> __s32 param;
>> diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index
>> a1abbcd..96a4d9d 100644
>> --- a/intel/intel_bufmgr.h
>> +++ b/intel/intel_bufmgr.h
>> @@ -273,6 +273,9 @@ int drm_intel_get_reset_stats(drm_intel_context
>> *ctx, int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
>> int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
>>
>> +int drm_intel_get_pooled_eu(int fd);
>> +int drm_intel_get_min_eu_in_pool(int fd);
>> +
>> /** @{ Compatibility defines to keep old code building despite the symbol
>> rename
>> * from dri_* to drm_intel_*
>> */
>> diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index
>> 0a4012b..b0a0eb9 100644
>> --- a/intel/intel_bufmgr_gem.c
>> +++ b/intel/intel_bufmgr_gem.c
>> @@ -3237,6 +3237,36 @@ drm_intel_get_eu_total(int fd, unsigned int
>> *eu_total)
>> return 0;
>> }
>>
>> +int
>> +drm_intel_get_pooled_eu(int fd)
>> +{
>> + drm_i915_getparam_t gp;
>> + int ret;
>> +
>> + memclear(gp);
>> + gp.param = I915_PARAM_HAS_POOLED_EU;
>> + gp.value = &ret;
>> + if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
>> + return -errno;
>> +
>> + return ret;
>> +}
>> +
>> +int
>> +drm_intel_get_min_eu_in_pool(int fd)
>> +{
>> + drm_i915_getparam_t gp;
>> + int ret;
>> +
>> + memclear(gp);
>> + gp.param = I915_PARAM_MIN_EU_IN_POOL;
>> + gp.value = &ret;
>> + if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
>> + return -errno;
>> +
>> + return ret;
>> +}
>> +
>> /**
>> * Annotate the given bo for use in aub dumping.
>> *
>> --
>> 2.1.4
>>
>> _______________________________________________
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