[Intel-gfx] [PATCH 0/6] Allow DC state to reset the counter on screen enabled.

[Rodrigo Vivi]

For now DC is only helping on screen off scenarios since PSR is disabled.

But if we want to enable PSR first we need to make DC reliable with screen on.
Biggest challenge is to deal with vblank counters since frame counter register
is read only and can be reset in DC state.

This series is one of possible approaches, but brings the down side of not
being possible to use runtime pm with vblank enabled. Some test cases needs
to be adapted to represent this new vision.

But also this series is not fully tested. Apparently I have an issue yet
with flip-vs-expired-vblank_* tests and pm_rpm basic tests.

So, while I investigate and finish the test execution I'd like to get some
feedback on this approach. This is why I'm sending this series right now.

Please let me know if this is acceptable or if you have any better aproach
ideas or any idea about the test failures above.

Thanks a lot,
Rodrigo.

Rodrigo Vivi (6):
  drm: Add vblank prepare and unprepare hooks.
  drm/i915: Move drm_crtc_vblank_get out of disabled pre-emption area.
  drm/i915: Split gen 9 irq hooks definitions.
  drm/i915: Introduce vblank power domain to avoid DC entry when waiting
    for vblank.
  drm: Introduce drm_crtc_vblank_sanitize_counter.
  drm/i915: Sanitize drm crtc vblank counter after DC reset frame count.

 drivers/gpu/drm/drm_irq.c               | 83 ++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/i915_drv.h         |  1 +
 drivers/gpu/drm/i915/i915_irq.c         | 28 +++++++++--
 drivers/gpu/drm/i915/intel_runtime_pm.c |  3 ++
 drivers/gpu/drm/i915/intel_sprite.c     |  8 ++--
 include/drm/drmP.h                      | 43 +++++++++++++++++
 include/drm/drm_irq.h                   | 21 +++++++++
 7 files changed, 179 insertions(+), 8 deletions(-)

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2.4.3