[Intel-gfx] [PATCH] drm/i915/gen9: Give one extra block per line for SKL plane WM calculations

Matt Roper matthew.d.roper at intel.com
Thu Aug 4 23:51:39 UTC 2016


On Thu, Aug 04, 2016 at 07:36:15PM -0400, Lyude wrote:
> Reviewed-by: Lyude <cpaul at redhat.com>

Merged to dinq.  Thanks for the quick review.


Matt

> 
> On Thu, 2016-08-04 at 14:08 -0700, Matt Roper wrote:
> > The bspec was updated a couple weeks ago to add an extra block per
> > line
> > to plane watermark calculations for linear pixel formats.
> > 
> > Bspec update 115327 description:
> >   "Gen9+ - Updated the plane blocks per line calculation for linear
> >   cases. Adds +1 for all linear cases to handle the non-block aligned
> >   stride cases."
> > 
> > Cc: Lyude <cpaul at redhat.com>
> > Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 4317cdf..6bd352a 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -3352,6 +3352,8 @@ static uint32_t skl_wm_method2(uint32_t
> > pixel_rate, uint32_t pipe_htotal,
> >  		plane_bytes_per_line *= 4;
> >  		plane_blocks_per_line =
> > DIV_ROUND_UP(plane_bytes_per_line, 512);
> >  		plane_blocks_per_line /= 4;
> > +	} else if (tiling == DRM_FORMAT_MOD_NONE) {
> > +		plane_blocks_per_line =
> > DIV_ROUND_UP(plane_bytes_per_line, 512) + 1;
> >  	} else {
> >  		plane_blocks_per_line =
> > DIV_ROUND_UP(plane_bytes_per_line, 512);
> >  	}
> -- 
> Cheers,
> 	Lyude

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795


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