[Intel-gfx] [PATCH v7 2/5] drm: Read DP branch device SW revision

[Mika Kahola]

SW revision is mandatory field for DisplayPort branch
devices. This is defined in DPCD register field 0x50A.

v2: move drm_dp_ds_revision structure to be part of
    drm_dp_link structure (Daniel)

Signed-off-by: Mika Kahola <mika.kahola at intel.com>
---
 drivers/gpu/drm/drm_dp_helper.c | 27 +++++++++++++++++++++++++++
 include/drm/drm_dp_helper.h     |  5 +++++
 2 files changed, 32 insertions(+)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 5fecdc1..1f36016 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -541,6 +541,33 @@ int drm_dp_downstream_hw_rev(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
 EXPORT_SYMBOL(drm_dp_downstream_hw_rev);
 
 /**
+ * drm_dp_downstream_sw_rev() - read DP branch device SW revision
+ * @aux: DisplayPort AUX channel
+ *
+ * Returns SW revision on success or negative error code on failure
+ */
+int drm_dp_downstream_sw_rev(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+			     struct drm_dp_aux *aux, struct drm_dp_link *link)
+{
+	uint8_t tmp[2];
+	int err;
+
+	if (!(dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT))
+		return -EINVAL;
+
+	err = drm_dp_dpcd_read(aux, DP_BRANCH_SW_REV, tmp, 2);
+
+	if (err < 0)
+		return err;
+
+	link->ds_sw_rev.major = tmp[0];
+	link->ds_sw_rev.minor = tmp[1];
+
+	return 0;
+}
+EXPORT_SYMBOL(drm_dp_downstream_sw_rev);
+
+/**
  * drm_dp_downstream_id() - identify branch device
  * @aux: DisplayPort AUX channel
  *
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 1127948..45366aa 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -447,6 +447,7 @@
 #define DP_BRANCH_OUI			    0x500
 #define DP_BRANCH_ID                        0x503
 #define DP_BRANCH_HW_REV                    0x509
+#define DP_BRANCH_SW_REV                    0x50A
 
 #define DP_SET_POWER                        0x600
 # define DP_SET_POWER_D0                    0x1
@@ -815,6 +816,7 @@ struct drm_dp_link {
 	unsigned int num_lanes;
 	unsigned long capabilities;
 	struct drm_dp_ds_revision ds_hw_rev;
+	struct drm_dp_ds_revision ds_sw_rev;
 };
 
 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link);
@@ -829,6 +831,9 @@ int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6]);
 int drm_dp_downstream_hw_rev(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
 			     struct drm_dp_aux *aux, struct drm_dp_link *link);
 
+int drm_dp_downstream_sw_rev(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+			     struct drm_dp_aux *aux, struct drm_dp_link *link);
+
 void drm_dp_aux_init(struct drm_dp_aux *aux);
 int drm_dp_aux_register(struct drm_dp_aux *aux);
 void drm_dp_aux_unregister(struct drm_dp_aux *aux);
-- 
1.9.1