[Intel-gfx] [PATCH 09/33] drm/i915: Mark unmappable GGTT entries as PIN_HIGH

Tvrtko Ursulin tvrtko.ursulin at linux.intel.com
Tue Aug 9 11:05:30 UTC 2016


On 07/08/16 15:45, Chris Wilson wrote:
> We allocate a few objects into the GGTT that we never need to access via
> the mappable aperture (such as contexts, status pages). We can request
> that these are bound high in the VM to increase the amount of mappable
> aperture available. However, anything that may be frequently pinned
> (such as logical contexts) we want to use the fast search & insert.

Is the last bit still true after you merged:

   commit 202b52b7fbf70858609ec20829c7d69a13ffa351
   Author: Chris Wilson <chris at chris-wilson.co.uk>
   Date:   Wed Aug 3 16:04:09 2016 +0100

       drm: Track drm_mm nodes with an interval tree

Or we could PIN_HIGH the LRCs as well now?

Regards,

Tvrtko

> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c        | 2 +-
>   drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +++--
>   2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 309c5d9b1c57..c7f4b64b16f6 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1182,7 +1182,7 @@ static int lrc_setup_wa_ctx_obj(struct intel_engine_cs *engine, u32 size)
>   	}
>
>   	ret = i915_gem_object_ggtt_pin(engine->wa_ctx.obj, NULL,
> -				       0, PAGE_SIZE, 0);
> +				       0, PAGE_SIZE, PIN_HIGH);
>   	if (ret) {
>   		DRM_DEBUG_DRIVER("pin LRC WA ctx backing obj failed: %d\n",
>   				 ret);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 16b726fe33eb..09f01c641c14 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2093,7 +2093,7 @@ static int intel_ring_context_pin(struct i915_gem_context *ctx,
>
>   	if (ce->state) {
>   		ret = i915_gem_object_ggtt_pin(ce->state, NULL, 0,
> -					       ctx->ggtt_alignment, 0);
> +					       ctx->ggtt_alignment, PIN_HIGH);
>   		if (ret)
>   			goto error;
>   	}
> @@ -2629,7 +2629,8 @@ static void intel_ring_init_semaphores(struct drm_i915_private *dev_priv,
>   			i915.semaphores = 0;
>   		} else {
>   			i915_gem_object_set_cache_level(obj, I915_CACHE_LLC);
> -			ret = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 0);
> +			ret = i915_gem_object_ggtt_pin(obj, NULL,
> +						       0, 0, PIN_HIGH);
>   			if (ret != 0) {
>   				i915_gem_object_put(obj);
>   				DRM_ERROR("Failed to pin semaphore bo. Disabling semaphores\n");
>


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