[Intel-gfx] [PATCH v2] drm/i915: Initialize legacy semaphores from engine hw id indexed array

Chris Wilson chris at chris-wilson.co.uk
Thu Aug 11 11:20:48 UTC 2016


On Thu, Aug 11, 2016 at 12:05:58PM +0100, Tvrtko Ursulin wrote:
> @@ -1394,9 +1393,13 @@ static int gen6_signal(struct drm_i915_gem_request *req)
>  	if (ret)
>  		return ret;
>  
> -	for_each_engine_id(useless, dev_priv, id) {
> -		i915_reg_t mbox_reg = req->engine->semaphore.mbox.signal[id];
> +	for_each_engine(engine, dev_priv) {
> +		i915_reg_t mbox_reg;
> +
> +		if (engine->hw_id > GEN6_SEMAPHORE_LAST)
> +			continue;

Yeah, this makes more sense to me...

> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index ac568808aeb1..c2d8677b5b9f 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -277,11 +277,12 @@ struct intel_engine_cs {
>  		u32	sync_seqno[I915_NUM_ENGINES-1];
>  
>  		union {
> +#define GEN6_SEMAPHORE_LAST VECS_HW
>  			struct {
>  				/* our mbox written by others */
> -				u32		wait[I915_NUM_ENGINES];
> +				u32		wait[GEN6_SEMAPHORE_LAST + 1];

but I agree with your hesistation here.

#define GEN6_SEMAPHORE_LAST VECS_HW
#define GEN6_NUM_SEMAPHORES (GEN6_SEMAPHORE_LAST_HW + 1)
#define GEN6_MASK_SEMAPHORES GENMASK(GEN6_SEMAPHORE_LAST, 0)

if (!(BIT(engine->hw_id) & GEN6_SEMAPHORES_MASK))
	continue;

(can't decide on NUM/MASK_SEM or SEM_COUNT/MASK)

would that look better?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


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