[Intel-gfx] [PATCH 27/33] drm/i915: Print the batchbuffer offset next to BBADDR in error state
Joonas Lahtinen
joonas.lahtinen at linux.intel.com
Thu Aug 11 12:24:49 UTC 2016
On su, 2016-08-07 at 15:45 +0100, Chris Wilson wrote:
> It is useful when looking at captured error states to check the recorded
> BBADDR register (the address of the last batchbuffer instruction loaded)
> against the expected offset of the batch buffer, and so do a quick check
> that (a) the capture is true or (b) HEAD hasn't wandered off into the
> badlands.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_gpu_error.c | 13 ++++++++++++-
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ed9d872859b3..4023718017a8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -552,6 +552,7 @@ struct drm_i915_error_state {
> struct drm_i915_error_object {
> int page_count;
> u64 gtt_offset;
> + u64 gtt_size;
> u32 *pages[0];
> } *ringbuffer, *batchbuffer, *wa_batchbuffer, *ctx, *hws_page;
>
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 1bceaf96bc5f..9faac19029cd 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -243,6 +243,14 @@ static void error_print_engine(struct drm_i915_error_state_buf *m,
> err_printf(m, " IPEIR: 0x%08x\n", ee->ipeir);
> err_printf(m, " IPEHR: 0x%08x\n", ee->ipehr);
> err_printf(m, " INSTDONE: 0x%08x\n", ee->instdone);
> + if (ee->batchbuffer) {
> + u64 start = ee->batchbuffer->gtt_offset;
> + u64 end = start + ee->batchbuffer->gtt_size;
> +
> + err_printf(m, " batch: [0x%08x %08x, 0x%08x %08x]\n",
underscores to join the numbers for consistency, I think one way or
another should be kept as a standard.
> + upper_32_bits(start), lower_32_bits(start),
> + upper_32_bits(end), lower_32_bits(end));
> + }
> if (INTEL_GEN(m->i915) >= 4) {
> err_printf(m, " BBADDR: 0x%08x %08x\n",
> (u32)(ee->bbaddr>>32), (u32)ee->bbaddr);
> @@ -657,7 +665,10 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
> if (!dst)
> return NULL;
>
> - reloc_offset = dst->gtt_offset = vma->node.start;
> + dst->gtt_offset = vma->node.start;
> + dst->gtt_size = vma->node.size;
> +
> + reloc_offset = dst->gtt_offset;
> use_ggtt = (src->cache_level == I915_CACHE_NONE &&
> (vma->flags & I915_VMA_GLOBAL_BIND) &&
> reloc_offset + num_pages * PAGE_SIZE <= ggtt->mappable_end);
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
More information about the Intel-gfx
mailing list