[Intel-gfx] [PATCH v2] Revert "drm/i915/chv: Set min freq to efficient frequency on chv"

[Ville Syrjälä]

On Fri, Aug 12, 2016 at 09:35:00AM +0300, Ville Syrjälä wrote:
> On Fri, Aug 12, 2016 at 04:52:15PM +0530, deepak.s at linux.intel.com wrote:
> > From: Deepak S <deepak.s at linux.intel.com>
> > 
> > With latest Punit FW, vgg input voltag drop falling to minimum is fixed.
> > So reverting the WA patch & moving to turbo freq opreation range to [RPn -> RP0]
> > 
> > This reverts commit 5b7c91b78b1ce6663e0f1f037f6cb4d7c9537d44.
> > 
> > commit 5b7c91b78b1ce6663e0f1f037f6cb4d7c9537d44
> > Author: Deepak S <deepak.s at linux.intel.com>
> > Date:   Sat May 9 18:15:46 2015 +0530
> > 
> >     drm/i915/chv: Set min freq to efficient frequency on chv
> > 
> > v2: Fix inconsistent return type. (Chris)
> > 
> > Acked-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Signed-off-by: Deepak S <deepak.s at linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 21 +++++++++++++++++++--
> >  1 file changed, 19 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 81ab119..7844bf5 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5579,6 +5579,24 @@ static int cherryview_rps_guar_freq(struct drm_i915_private *dev_priv)
> >  	return rp1;
> >  }
> >  
> > +static u32 cherryview_rps_min_freq(struct drm_i915_private *dev_priv)
> > +{
> > +	struct pci_device *pdev = dev_priv->drm.pdev;
> > +	u32 val, rpn;
> > +
> > +	if (pdev->revision >= 0x20) {
> > +		val = vlv_punit_read(dev_priv, FB_GFX_FMIN_AT_VMIN_FUSE);
> > +		rpn = ((val >> FB_GFX_FMIN_AT_VMIN_FUSE_SHIFT) &
> > +		       FB_GFX_FREQ_FUSE_MASK);
> > +	} else { /* For pre-production hardware */
> > +		val = vlv_punit_read(dev_priv, PUNIT_GPU_STATUS_REG);
> > +		rpn = ((val >> PUNIT_GPU_STATIS_GFX_MIN_FREQ_SHIFT) &
> > +		       PUNIT_GPU_STATUS_GFX_MIN_FREQ_MASK);
> 
> Please drop the pre-production hw case. We got rid of all pre-production
> junk long ago.

Oh and maybe add a note to the commit message explaining why it's not a
1:1 revert. You can refer to commit 5b5929cbe3f7 ("drm/i915/chv: remove
pre-production hardware workarounds") as the reason for the discrepancy.

> 
> > +	}
> > +
> > +	return rpn;
> > +}
> > +
> >  static int valleyview_rps_guar_freq(struct drm_i915_private *dev_priv)
> >  {
> >  	u32 val, rp1;
> > @@ -5818,8 +5836,7 @@ static void cherryview_init_gt_powersave(struct drm_i915_private *dev_priv)
> >  			 intel_gpu_freq(dev_priv, dev_priv->rps.rp1_freq),
> >  			 dev_priv->rps.rp1_freq);
> >  
> > -	/* PUnit validated range is only [RPe, RP0] */
> > -	dev_priv->rps.min_freq = dev_priv->rps.efficient_freq;
> > +	dev_priv->rps.min_freq = cherryview_rps_min_freq(dev_priv);
> >  	DRM_DEBUG_DRIVER("min GPU freq: %d MHz (%u)\n",
> >  			 intel_gpu_freq(dev_priv, dev_priv->rps.min_freq),
> >  			 dev_priv->rps.min_freq);
> > -- 
> > 1.9.1
> 
> -- 
> Ville Syrjälä
> Intel OTC

-- 
Ville Syrjälä
Intel OTC